Low-loss through silicon Vias (TSVs) and transmission lines for 3D optoelectronic integration
Low-loss through silicon Vias (TSVs) and transmission lines for 3D optoelectronic integration
复制标题
用于 3D 光电集成的低损耗硅通孔 (TSV) 和传输线
DOI：
10.1016/j.mee.2021.111509
复制
发表时间：
2021-02
影响因子：
2.3
通讯作者：
Tu Zhijuan
中科院分区：
文献类型：
--
作者：
Wang Shuxiao;Qing Wang;Yufei Liu;Lianxi Jia;Yu Mingbin;Peng Sun;Fei Geng;Yan Cai;Tu Zhijuan
The optoelectronic hybrid integration based on co-package has attracted much attention to meet the requirements of high-performance chip development and functional integration. TSVs and redistribution layers (RDLs) are of great importance for both the packaging process and the system design of 3D integration. This paper presents the measurements and analysis of TSV and RDL test structures, from DC to high frequency up to 67 GHz. TSVs and RDLs with low insertion loss up to 67 GHz are demonstrated and the impact of TSV arrangements on the transmission performance are analysed. The insertion loss of a 500 μm long coplanar waveguide (CPW) transmission line of frontside RDL (FSRDL) is 0.75 dB at 67 GHz. The insertion loss is less than 1 dB at 67 GHz for a TSV-RDL signal path with the length of 500 μm. • The low-loss TSVs and RDLs are designed by electromagnetic simulation software. • The fabrication process of the TSVs and RDLs for silicon interposer is descripted. • TSVs and RDLs are characterized from DC to high frequency up to 67 GHz. • The impact of TSV arrangements on the transmission performance are analysed.
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影响因子：
2.1
作者：
Thomson, David;Zilkie, Aaron;Nedeljkovic, M.
通讯作者：
Nedeljkovic, M.
DOI：
10.1002/0471754323
发表时间：
2005-11
期刊：
--
影响因子：
--
作者：
C. Caloz;T. Itoh
通讯作者：
C. Caloz;T. Itoh
DOI：
--
发表时间：
2019
期刊：
--
影响因子：
--
作者：
J. Bauwelinck;G. Roelkens;P. Absil;J. Campenhout
通讯作者：
J. Bauwelinck;G. Roelkens;P. Absil;J. Campenhout
影响因子：
3.8
作者：
Lindenmann, N.;Balthasar, G.;Koos, C.
通讯作者：
Koos, C.
影响因子：
1.6
作者：
Roesch, WJ;Jittinorasett, S
通讯作者：
Jittinorasett, S