Random-telegraph-noise-enabled true random number generator for hardware security.

Random-telegraph-noise-enabled true random number generator for hardware security.
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随机电报噪声启用真随机数生成器硬件安全。

DOI:
10.1038/s41598-020-74351-y
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发表时间:
2020-10-14
期刊:
影响因子:
4.6
通讯作者:
Ji Z
Ji Z
中科院分区:
综合性期刊3区
文献类型:
--
作者:
Brown J;Zhang JF;Zhou B;Mehedi M;Freitas P;Marsland J;Ji Z

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物联网的未来安全是网络安全领域的一个关键问题。其中一个关键问题是生成具有严格功率和区域约束的随机数的能力。“真随机数发生器”已被提出作为一个潜在的解决方案,这个问题,但在输出比特率,功耗和设计复杂性必须作出改进。在这项工作中,我们提出了一种新的和实验验证的“真随机数发生器”,完全使用传统的CMOS技术,以及提供关键的改进,在复杂性,输出比特率和功耗比以前的设计。它利用单个CMOS晶体管通道电流中电报噪声的固有随机性作为熵源。首次可以利用多电平和异常电报噪声,这大大降低了设备的选择性,并提供了更大的比特率。该设计使用试验板和FPGA概念验证电路进行验证,并通过了所有15项NIST随机性测试,无需对生成的比特流进行任何后处理。该设计还显示了对LSTM神经网络执行的机器学习攻击的弹性。
The future security of Internet of Things is a key concern in the cyber-security field. One of the key issues is the ability to generate random numbers with strict power and area constrains. “True Random Number Generators” have been presented as a potential solution to this problem but improvements in output bit rate, power consumption, and design complexity must be made. In this work we present a novel and experimentally verified “True Random Number Generator” that uses exclusively conventional CMOS technology as well as offering key improvements over previous designs in complexity, output bitrate, and power consumption. It uses the inherent randomness of telegraph noise in the channel current of a single CMOS transistor as an entropy source. For the first time multi-level and abnormal telegraph noise can be utilised, which greatly reduces device selectivity and offers much greater bitrates. The design is verified using a breadboard and FPGA proof of concept circuit and passes all 15 of the NIST randomness tests without any need for post-processing of the generated bitstream. The design also shows resilience against machine learning attacks performed by the LSTM neural network.
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