Very Large Scale Integration (VLSI) for Digital Signal Processing

用于数字信号处理的超大规模集成 (VLSI)

• 批准号: 8414674
• 负责人: Kenneth Steiglitz
• 金额: $ 11.27万
• 依托单位: Princeton University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1985
• 资助国家: 美国
• 起止时间: 1985-05-01 至 1987-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8414674&HistoricalAwards=false
• 关键词: Very; Large; Scale; Integration; VLSI

Research is conducted on these aspects of very large scale integrated (VLSI) design that are especially relevant to digital signal processing. This research deals with the implementation of important digital signal processing algorithms, such as linear filtering and Fourier transformation, in custom VLSI circuit technology. These algorithms have a great deal of inherent structural regularity and it is the objective of this work to exploit this regularity to increase throughput and to make design and testing of signal processing chips straightforward and easier. In this investigation, automatic leaf-cell (use of same cell in many instances) optimization, global performance of regular structures, and testing of regular structures are being pursued. The long-range goal of this effort is to reduce the algorithmic structure to implementation on a chip in the most expeditious and efficient manner.

本文对超大规模集成电路的这些方面进行了研究 （VLSI）设计，特别是与数字信号相关 处理. 这项研究涉及重要的实施 数字信号处理算法，如线性滤波和 傅立叶变换，在定制VLSI电路技术。 这些 算法有很多内在的结构规律性， 这项工作的目的是利用这种规律性来增加 并进行信号处理芯片的设计和测试 简单易懂。 在本研究中，自动叶细胞 (use优化、全局性能 常规结构的测试， 追求。 这项工作的长期目标是减少 在大多数情况下， 迅速和有效的方式。