Linear Speedup Architectures

线性加速架构

• 批准号: 8912100
• 负责人: Kenneth Steiglitz
• 金额: $ 20.71万
• 依托单位: Princeton University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1989
• 资助国家: 美国
• 起止时间: 1989-11-15 至 1992-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8912100&HistoricalAwards=false
• 关键词: Linear; Speedup; Architectures

Limiting factors in highly parallel computation that stem from timing, communication, and reliability requirements are studied. Particular emphasis is placed on large regular structures, which are especially well suited for signal processing and iterative scientific computation, such as solving differential equations and simulating cellular automata. Computers with a million or more processors will be needed in some of these applications and mathematical results are needed to guide designer's decisions on synchronization method, memory organization and use of redundancy. The over-riding concern is whether the cost of systems can be made to grow slowly enough with the amount of parallelism. Ideally, the goal is to ensure linear speedup - a proportionate return on hardware investment. In the area of timing, work continues in statistical modeling of clock skew in synchronous systems, the analysis of throughput in self-timed arrays, and an ongoing comparison between these two synchronization paradigms. In synchronous systems all processing in different computational elements is simultaneously triggered by a signal called clock. Clock skew arises when the clock signal must travel different distances in order to reach all parts of a system. This may cause the system to work incorrectly. In self-timed systems, different elements do not assume their computations are synchronized and exchange "hand- shaking" signals everytime they need to synchronize. This may render the system slower due to overhead. In the area of communication, work continues on bounds based on pebbling arguments. These bounds on throughput depend only on memory bandwidth, and reveal the constraining effect of that resource. A major problem in parallel processing with large number of processors is to ensure that data is available for all processors to operate on. This data must be present in the memory of the different elements and/or be input/output to the machine. The availability of data ultimately determines computational speed. Analogous questions about the reliability of large parallel arrays are addressed. The question of whether or not linear speedup is attainable with fixed reliability is a central problem here, and is the subject of theoretical work.

高度并行计算中的限制因素源于时间， 通信和可靠性要求进行了研究。 特别 重点放在大型常规结构上，特别是 非常适合于信号处理和迭代科学计算， 比如解微分方程和模拟细胞 自动机 将需要具有一百万或更多处理器的计算机 在这些应用中的一些中，需要数学结果来 指导设计人员决定同步方法、内存 组织和使用冗余。 最重要的问题是系统的成本是否可以控制在 随着并行性的增加而缓慢增长。 理想情况下，目标 是确保线性加速-硬件的比例回报 投资 在计时领域，时钟的统计建模工作仍在继续 同步系统中的时滞，分析了自同步系统中的吞吐量 阵列，以及这两种同步之间的持续比较 范例 在同步系统中，所有处理都在不同的 计算元件同时被一个称为 时钟 当时钟信号必须以不同的方式传输时， 距离，以达到系统的所有部分。 这可能导致 系统工作不正常。 在自定时系统中，不同的元素 不要假设他们的计算是同步的，并交换“手”， 每次需要同步时都发出“震动”信号。 这可使得所 系统由于开销而变慢。 在通信领域，继续开展基于 敷衍的论点 吞吐量的这些界限仅取决于内存 带宽，并揭示该资源的约束作用。 一 具有大量处理器的并行处理的主要问题是 以确保数据可用于所有处理器进行操作。 这些数据必须存在于不同元素的内存中 和/或被输入/输出到机器。 数据的可用性 最终决定了计算速度。 关于大型平行阵列可靠性的类似问题是 处理。 线性加速是否可以实现的问题 固定可靠性是这里的一个中心问题，也是 理论工作。