CAD (Computer-Aided Design) Tools for Designing Signal Processors

这项研究旨在开发一种高效的CAD工具系统，以便快速高效地实现一类VLSI体系结构。提出者将把系统限制在一类受限制的目标体系结构中，但仍然足够健壮，足以引起人们的兴趣。目标体系结构是分层网格，它是Systolal数组类的扩展。他们的系统也将把信号处理作为目标应用领域，因为该国的大部分CAD工作都是在用于信号处理的VLSI电路上。所提出的支持目标架构设计的工具具有以下功能：模块生成和多级逻辑简化；组件内的栅极布局；分层网格架构内的组件布局；以及帮助电路仿真、布局、验证和测试向量生成的工具。这些工具的设计将使它们可以调整到除分层网格之外的其他架构类别。超大规模集成电路(VLSI)是一个研究如何设计高度复杂的集成电路及相关电子系统的新领域。该领域的发展对国家在电子产品方面的竞争领先地位至关重要。需要对工具、工具系统和计算机辅助设计(CAD)方法进行研究，因为现有的工具和设计系统不能满足当今VLSI技术的可能性。尤其令人感兴趣的是设计过程自动化方面的进展。该方案是针对CAD自动化问题提出的，其结果将对我们在这一领域的研究有一定的促进作用。这项研究的目的是转移技术，因为这些工具将被设计成与标准的、广泛使用的软件集成，如Unix、Valid Logic Workstation、来自Berkeley的广泛使用的魔法工具和来自Xidex的MOSSIM。联合首席调查员在计算机辅助设计工具领域做出了重要贡献。他们带来了理论和实践人才的有益结合。

The proposed research is directed toward development of an efficient system of CAD tools which allow rapid and efficient implementation of a class of VLSI architectures. The proposers will limit the system to a class of target architectures that is restricted, but still robust enough to be of interest. The target architectures are hierarchial meshes, an extension of the systolic array class. Their system will also have signal processing as the target application area, since the majority of CAD effort in the country is on VLSI circuits for signal processing. The proposed tools to support the design of target architectures do the functions: module generation and multilevel logic reduction; gate placement within a component; component placement within the hierarchial mesh architecture, and tools to help with circuit simulation, layout, verification, and test vector generation. The tools will be designed so that they can be tuned to classes of architectures other than hierarchial mesh. VLSI (very large scale integration) is a recent field that explores how to design highly complex integrated circuits and related electronic systems. Development of the field is important to the nation's competitive lead in electronics. Research on tools, tool systems and computer-aided design (CAD) methodologies is needed because existing tools and design systems do not scale up to meet the possibilities of today's VLSI technology. Especially of interest is progress in automating the design process. This proposal is aimed at the CAD automation problem, and the results will advance our knowledge in this field. This research is aimed at transfer of the technology, since the tools will be designed to integrate with standard, widely used software such as Unix, VALID Logic workstations, the widely-used MAGIC tools from Berkeley and MOSSIM from Xidex. The co-principal investigators have made important contributions to the CAD tools area. They bring to bear a useful blend of theoretical and practical talents.