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Issues in the Design of Low Power, High Performance Processors

Issues in the Design of Low Power, High Performance Processors
低功耗、高性能处理器的设计问题
批准号:
9705128
负责人:
Mary Irwin
金额:
$32.54万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1997
资助国家:
美国
项目状态:
已结题
起止时间:
1997-07-01 至 2001-06-30

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中文摘要
翻译
随着便携式移动的系统的重要性的增加,功耗已经被提升为关键的设计参数。 对于性能驱动型设计,功耗问题也很重要,因为功耗可能很快会取代芯片面积成为主要的设计约束。 这就是这个项目的动机,它专注于低功耗,高性能处理器的设计,特别是那些定制用于移动的环境。 在体系结构、软件和应用程序方面寻求进步。 在架构领域的活动包括低功耗数据路径功能单元的设计和表征,低功耗控制逻辑的设计,低功耗片上高速缓存的设计,以及低功耗微架构设计策略的推导和量化。 软件和应用领域将包括研究编译器优化技术、算法和数据结构对候选架构上运行的代码功耗的影响。
英文摘要
With the increasing importance of portable, mobile systems, power consumption has been elevated to be a critical design parameter. Concern over power dissipation is also important for performance-driven designs where power may soon displace chip area as the principal design constraint. This is the motivation for this project, which focuses on the design of low-power, high-performance processors, particularly those customized for use in a mobile environment. Advances are sought in architecture, software, and applications. Activities in the architecture area include the design and characterization of low-power data path functional units, the design of low-power control logic, the design of low- power on-chip caches, and the derivation and quantification of a set of strategies for designing low-power microarchitectures. The software and applications areas will include a study of the effects of compiler optimization techniques, algorithms, and data structures on power consumption of code running on candidate architectures.
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会议论文
SHF: Small: Collaborative Research: Testing and Design-for-Testability Solutions for 3D Stacked Integrated Circuits
CPA-CPL-T: Collaborative Research: REEact: A Robust Execution Environment for Fragile Multicore Systems
ITR: Collaborative Research: Optimization and Integrated Control of Low Power Wireless Multimedia Networks
CISE Research Instrumentation: Prototyping Equipment for Application Specific Architectures
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