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High Performance, Fine Grained, Application Specific, VLSI Architectures

High Performance, Fine Grained, Application Specific, VLSI Architectures
高性能、细粒度、特定于应用的 VLSI 架构
批准号:
9102500
负责人:
Mary Irwin
金额:
$25.31万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1991
资助国家:
美国
项目状态:
已结题
起止时间:
1991-08-01 至 1995-01-31

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中文摘要
翻译
这项研究的主要目的是研究一种更通用的信号处理体系结构,它可以在不增加粒度的情况下达到与专用信号处理体系结构相同的性能水平。大多数试图扩展体系结构以容纳更通用的应用程序类的尝试通常会导致粒度的增加。随着粒度的增加,处理器的总体尺寸增加,或者为了保持总体物理尺寸不变,使用更少的处理单元。在任何一种情况下,最终结果都是性能下降。本项目试图开发更通用的信号处理架构,以避免这一困难,同时保持细粒度处理器的粒度、性能和物理尺寸,并具有更粗粒度处理器的灵活性。
英文摘要
Irwin The primary thrust of the research is the investigation of a more general purpose signal processing architecture which achieves the same level of performance as special-purpose signal processing architectures without an accompanying increase in granularity. Most attempts at trying to expand an architecture to accommodate a more general class of applications usually result in an increase in granularity. With the increase in granularity either the overall size of the processor increases or, to keep the overall physical size constant, fewer processing cells are utilized. In either case, the end result is a decrease in performance. This project attempts the development of more general purpose signal processing architectures which avoid this difficulty while maintaining the granularity, performance, and physical size of fine grain processors with the flexibility of more coarse grain processors.
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会议论文
SHF: Small: Collaborative Research: Testing and Design-for-Testability Solutions for 3D Stacked Integrated Circuits
CPA-CPL-T: Collaborative Research: REEact: A Robust Execution Environment for Fragile Multicore Systems
ITR: Collaborative Research: Optimization and Integrated Control of Low Power Wireless Multimedia Networks
Issues in the Design of Low Power, High Performance Processors
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