Research Initiation: An Investigation of Test Compaction Algorithms and On-Chip Test Generation Schemes

研究启动：测试压缩算法和片上测试生成方案的研究

• 批准号: 8807540
• 负责人: Sreejit Chakravarty
• 金额: $ 5.81万
• 依托单位: SUNY at Buffalo
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1988
• 资助国家: 美国
• 起止时间: 1988-06-01 至 1991-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8807540&HistoricalAwards=false
• 关键词: Research; Initiation; Investigation; Test; Compaction

Dr. Chakravarty proposes to study computational problems in the domain of VLSI testing. He is especially concerned with the generation and compaction of test stimuli when the circuit is designed using design-for-testability rules, such as "Scan- In/Scan-Out", and Built-In Self-Test (BIST) design. Four problems are considered: test generation, random testing, compaction of test data, and on-chip test generation. He addresses these problems using several fault models: stuck-at, transistor stuck open, and feedback/non-feedback bridging faults. These problems are known to be NP-hard. Random testing for transistor stuck-open and bridging faults motivates a number of such problems. Dr. Chakravarty is investigating algorithms that lead to exact and to approximate solutions for these problems. He is also studying NP-hard minimization problems motivated by the need for compacting test data, looking for approximation algorithms and investigating the technique of simulated annealing to solve them.

Chakravarty博士建议研究计算问题， VLSI测试领域。 他特别关心的是 测试激励的产生和压缩，当电路 使用可测试性设计规则进行设计，例如“扫描- 输入/扫描输出”和内建自测试（BIST）设计。 四 考虑的问题：测试生成，随机测试， 测试数据的压缩和片上测试生成。 他 使用几种故障模型来解决这些问题：固定， 晶体管卡在开路，以及反馈/非反馈桥接故障。 这些问题都是NP难的。 随机测试 晶体管开路和桥接故障激发了许多 这样的问题。 查克拉瓦蒂博士正在研究算法 导致这些问题精确和近似的解决方案。 他还在研究NP难最小化问题， 需要压缩测试数据，寻找近似值 算法和模拟退火技术的研究 来解决它们。