Research Initiation: Integrating Compiler Technologies and Parallel MicroArchitectures for High Performance Micro System Design

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The goal of this project is to derive effective approaches for integration of compiler, microarchitecture and circuit design techniques to achieve high performance. At the compiler level, the focus is to combine register allocation/assignment and code scheduling algorithms to exploit architecture parallelism. At the microarchitecture level, the objective is to investigate how various forms of parallelism (such as pipelining and multiple instructions per cycle) can be used by the compiler to improve performance. At circuit level, the intent is to apply novel memory and logic design techniques to efficiently support the parallelism in the microarchitecture. The principal investigator is a junior faculty who has done good research as a Ph.D. student. This research project has good ideas and it is likely that new results will be obtained in an important research area. Funding is highly recommended.