Vector Processors for Systolic Arrays

用于脉动阵列的矢量处理器

• 批准号: 8861368
• 负责人: Michael Griffin
• 金额: $ 5万
• 依托单位: Peregrine Engineering
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1989
• 资助国家: 美国
• 起止时间: 1989-01-01 至 1989-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8861368&HistoricalAwards=false
• 关键词: Vector; Processors; Systolic; Arrays

The digital signal and image processing industry continues to grow. However, many compute-bound, high-end, real-time needs are not currently being met. Application areas typifying these requirements are communications, radar/sonar, speech and scene analysis, computer vision and graphics. A new and powerful class of digital processor architectures is required to meet this need. This research is on a new digital processor design that has potential for significant increases in speed, area-speed and cost-performance measures. It can provide multi-megahertz fixed and floating point operation on one VLSI chip. Its innovative bit-serial interprocessor I/O structure makes it a candidate for fine-grain systolic array applications. The design goal is a system which achieves ten to one hundred MFLOP per chip computational bandwidth in a small, low cost package. This is in the class of desktop supercomputers. Such a machine could be used as an attached co-processor in general applications or embedded into signal and imaging systems in application specific environments. Reviewers gave this scores of 15, 15 and 18, which are quite high relative to all the scores. The three reviewers saw this as having al well-developed research plan, with high probability of good results leading to Phase II work. They said it is an important problem with substantial payoff. Solutions will contribute to the design of future instruments that depend on rapid processing of large arrays of numbers. The qualifications of the personnel are excellent.

数字信号和图像处理行业持续增长。 然而，许多受计算限制的高端实时需求目前尚未得到满足。 代表这些要求的应用领域包括通信、雷达/声纳、语音和场景分析、计算机视觉和图形。 需要一类新的、功能强大的数字处理器架构来满足这一需求。 这项研究是关于一种新的数字处理器设计，该设计有可能显着提高速度、面积速度和性价比指标。 它可以在一颗 VLSI 芯片上提供多兆赫兹的定点和浮点运算。 其创新的位串行处理器间 I/O 结构使其成为细粒度脉动阵列应用的候选者。 设计目标是在小型、低成本封装中实现每芯片 10 到 100 MFLOP 计算带宽的系统。 这是桌面超级计算机的类别。 这样的机器可以用作一般应用中的附加协处理器，或者嵌入到特定应用环境中的信号和成像系统中。 审稿人给出的评分为15分、15分和18分，相对于所有分数来说，这个分​​数相当高。 三位评审员认为这是一个完善的研究计划，很有可能在第二阶段工作中取得良好的结果。 他们说这是一个重要的问题，会带来丰厚的回报。 解决方案将有助于未来依赖于大量数字快速处理的仪器的设计。 人员素质优良。