Presidential Young Investigators Award: mm-Wave Devices and Integration Techniques

通过减小有源器件电容可以提高电子器件的固有响应时间。由于设备是使用复杂的光刻工具(如电子束光刻)进行横向调整的，因此设备也必须进行垂直调整，以确保适当的电荷控制。这包括FET和HEMT等器件中的有源沟道和接触区的减薄。特别是接触区，很难通过离子注入等传统技术来测量。选择性回刻和再生长技术将在很大程度上影响减小短沟道效应的纳米栅长器件的发展。使用化学辅助的离子束刻蚀系统和再生室将允许制造具有减少短沟道效应的纳米栅长器件。垂直器件之所以令人兴奋，是因为没有在横向器件中引起短沟道效应的增强衬底电流。此外，关键的器件尺寸是通过外延技术生长的，因此可以制作得非常小，从而减少电子传输时间并提高器件速度。这些和其他先进的制造技术将被研究用于为集成电路应用生产性能更好的固态器件。

The inherent response time of electronic devices can be improved by decreasing the active device capacitance. As devices are scaled laterally using sophisticated lithographic tools, such as e-beam lithography, the devices must also be scaled vertically to ensure proper charge control. This includes the thinning of active channel and contact regions in devices such as FET's and HEMT's. Contact regions, in particular, are difficult to scale by conventional techniques such as ion-implantation. Selective etch-back and regrowth techniques will substantially influence the development of nanometer gate length devices with reduced short channel effects. Using a chemically assisted ion-beam etching system and a regrowth chamber will allow nanometer gate length devices with reduced short channel effects to be fabricated. Vertical devices are exciting because enhanced substrate currents which cause short channel effects in lateral devices are absent. Also, the critical device dimensions are grown by epitaxial techniques and hence can be made extremely small, thereby decreasing electron transit times and enhancing device speed. These and other advanced fabrication techniques will be investigated for use in producing improved performance solid state devices for integrated circuit applications.