Presidential Young Investigators Award: mm-Wave Devices and Integration Techniques

电子设备的固有响应时间可以通过以下方式来改善： 减小有源器件电容。 随着设备规模的扩大 横向地使用复杂的光刻工具 光刻，器件也必须垂直缩放，以确保 适当的充电控制。 这包括有源沟道的减薄 以及诸如FET和HEMT的器件中的接触区。 接触 特别是，区域很难通过传统的 离子注入等技术。 选择性回蚀和再生长 技术将极大地影响纳米技术的发展。 具有减少的短沟道效应的栅极长度器件。 使用 化学辅助离子束蚀刻系统和再生长室 将允许具有减少的短沟道的纳米栅极长度器件 效果是可以伪造的。 垂直设备令人兴奋，因为 增强的衬底电流引起短沟道效应， 没有横向装置。 此外，关键器件尺寸为 通过外延技术生长并且因此可以被制造得非常小， 从而减少电子渡越时间并提高器件速度。 这些和其他先进的制造技术将被研究 用于生产性能改进的固态器件， 集成电路应用。

The inherent response time of electronic devices can be improved by decreasing the active device capacitance. As devices are scaled laterally using sophisticated lithographic tools, such as e-beam lithography, the devices must also be scaled vertically to ensure proper charge control. This includes the thinning of active channel and contact regions in devices such as FET's and HEMT's. Contact regions, in particular, are difficult to scale by conventional techniques such as ion-implantation. Selective etch-back and regrowth techniques will substantially influence the development of nanometer gate length devices with reduced short channel effects. Using a chemically assisted ion-beam etching system and a regrowth chamber will allow nanometer gate length devices with reduced short channel effects to be fabricated. Vertical devices are exciting because enhanced substrate currents which cause short channel effects in lateral devices are absent. Also, the critical device dimensions are grown by epitaxial techniques and hence can be made extremely small, thereby decreasing electron transit times and enhancing device speed. These and other advanced fabrication techniques will be investigated for use in producing improved performance solid state devices for integrated circuit applications.