MOS Analog VLSI Design, Indo - U.S. Conference and Workshop,New Delhi, India, January 1991, Group Travel Award in Indian Currency.

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Description: This project provides funding for four U.S. scientists to participate in a five day conference in New Delhi, India in the second week of January 1991. The conference will focus on MOS Analog VLSI Circuit Engineering. The Indian organizer is Dr. A.B. Bhattacharyya, Chairman, Center for Applied research in Electronics at the Indian Institute of Technology, New Delhi. Topics to be covered will include: CMOS process technology and analog circuits; MOS device modeling; sensors and transducers micropower design; conversion circuits; filters; design methods and automation; mixed mode simulation; automated physical layout; and emerging research topics. Scope: The primary emphasis in this conference is on bringing researchers in academia with technical people engaged in research and development in industry and to address questions in design and automation. In addition, areas where potential collaboration can result and would be beneficial will be identified. A number of U.S. electronic companies with branches in India will be represented in the conference.