Collaborative Research: Algorithms for Simulation and Design of Analog VLSI Lattices

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New technologies in areas such as wireless communication, portable computing, and handheld electronics have increased the demand for signal processing at high frequencies. Part of the challenge in designing silicon integrated circuits that can meet this demand is to overcome limitations in the efficiency and frequency bandwidth of modern transistors. Here it is proposed to use two-dimensional networks of inductors and capacitors to overcome these limitations. These high-speed, high-efficiency networks have a cut-off frequency that is higher than that for silicon-based transistors. Moreover, such networks can be incorporated into standard silicon chips that can be fabricated at low cost. The proposed research has the potential to revolutionize high-frequency analog signal processing, leading to chips that operate up to 1000 times faster than current ones.There are a large number of possible designs for such networks, and only a small number of these possibilities have already been explored. The proposed research seeks to develop algorithms that greatly assist in the simulation and design of two-dimensional inductor-capacitor networks. Simulating a large network involves the solution of a large, coupled system of equations that can be simplified greatly through mathematical analysis. It is proposed to use this simplification to develop fast, scalable algorithms and codes for network simulation. This would enable engineers to quickly learn the effect of changing one or more of the thousands of parameters in a typical large-scale inductor-capacitor network.It is also proposed to use optimization methods to automatically design lattices that achieve prescribed input-output relationships. The optimization work will use as a foundation the prior results of the proposers, including, for example, the development of a two-dimensional network that computes Fourier transforms in the analog domain. Such physically motivated ideas will be coupled with modern tools of parallel numerical computing such as PetSC (the Portable Extensible Toolkit for Scientific Computation) and TAO (the Toolkit for Advanced Optimization). This will result in fast, accurate tools that enable engineers to rapidly optimize the design of a lattice to achieve desired performance specifications.The expertise gained in carrying out the proposed research will enable the investigators to train students and researchers to solve problems in modern computational science and engineering. The proposed research encourages multidisciplinary interaction between scientists, engineers, applied mathematicians, and computer scientists spanning the spectrum from developers to users of computational tools.