RIA: Accurate and Efficient Timing Verification of Synchronous Digital Circuits Using Functional Timing Analysis

马利克，这项研究是关于验证同步数字系统的时间正确性。重点是在经过认证的时序分析范例中获得准确、高效的算法。这将时序分析的效率和覆盖率与时序模拟的准确性结合在一起。通过时序分析生成使电路组合部分中的长路径敏感的矢量。然后将其用于时序仿真。该研究解决的问题是，为了提供这些向量，时序分析必须考虑电路部件的功能。

Malik This research is on verifying the temporal correctness of synchronous digital systems. The emphasis is on obtaining accurate, efficient algorithms within the paradigm of certified timing analysis. This combines the efficiency and coverage of timing analysis with the accuracy of timing simulation. Vectors that sensitize the long paths in the combinational parts of the circuit are generated by timing analysis. These are then used in timing simulation. The research addresses the problem that in order to provide these vectors, timing analysis must consider the functionality of the circuit components.