NSF Young Investigator: Design Automation for Embedded Systems

NSF 青年研究员：嵌入式系统设计自动化

• 批准号: 9457396
• 负责人: Sharad Malik
• 金额: $ 31.25万
• 依托单位: Princeton University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1994
• 资助国家: 美国
• 起止时间: 1994-09-01 至 1999-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9457396&HistoricalAwards=false
• 关键词: NSF; Young; Investigator; Design; Automation

High fabrication costs coupled with decreasing time-to-market for products require an increase of the programmable component of integrated circuits. Core processors embedded in a gate array provide programmability. This changes circuit design from just gates in an array, to a combination of instructions running on a core processor coupled with a gate array. Gates, as basic units of computation on silicon, are well understood. This research is focused on understanding embedded instructions as basic units of computation on silicon. Initial work is on finding methodologies for synthesizing embedded software. Problems being examined are: worst case timing analysis; power modeling and analysis; and high- quality retargetable code synthesis. Approaches include: developing timing models capable of handling features such as caches and pipelines, and determining worst-case paths; analyzing system power consumption; and formal architectural specification of specialized architectures, as well as code-generation algorithms that can take advantage of special architectures.

高制造成本加上产品上市时间的缩短，需要增加集成电路的可编程元件。嵌入在门阵列中的核心处理器提供可编程性。这将电路设计从阵列中的门改变为在与门阵列耦合的核心处理器上运行的指令的组合。作为在硅上进行计算的基本单位，门是众所周知的。这项研究的重点是理解嵌入式指令作为硅上计算的基本单位。最初的工作是寻找合成嵌入式软件的方法。正在研究的问题包括：最坏情况时序分析；功率建模和分析；以及高质量的可重定向代码综合。方法包括：开发能够处理诸如缓存和流水线等特征的时序模型，并确定最坏情况下的路径；分析系统功耗；专业体系结构的正式体系结构规范，以及可以利用特殊体系结构的代码生成算法。