Unified Constitutive Modelling, Testing and Computer Design for Semiconductor Devices with Emphasis on Interfaces Behavior

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9313204 Desai Competitive and innovative designs for semiconductor and packaging manufacturing are dependent on the knowledge and understanding of the thermo-mechanical behavior of materials and interfaces in various chip-substrate and packaging systems. The currently available constitutive models and computer software to characterize such behavior are not adequate to allow for various important design factors such as elastic, plastic and creep strains, damage, degradation and softening, relative motions (slippage, delamination and warping), fatigue and cycles to failure under thermal, mechanical and other environmental (e.g., moisture) loadings. Appropriate laboratory testing devices and procedures that can allow macro and microlevel measurements leading to determination of realistic material constants for both solid ( chip and substrate) and interface materials are also not readily available. The objective of this research is to develop: (1) a unified constitutive modelling approach that can permit inclusion of the above factors for solids and interfaces, in a common mathematical framework that can permit selection of simple to advanced models depending upon the specific application need, (2) to perform comprehensive laboratory tests. (3) to determine material constants for the proposed models using the test data, and to verify the models with respect to the test results, (4) to implement the models in nonlinear, time dependent finite element procedures with attention to their robustness and reliability, and (5) to develop software that can be used for improved and optimized designs and manufacturing. The availability of the proposed computational tools will allow the design of more reliable and higher performance packages for semiconductor devices.