SBIR Phase II: A Demultiplexer for Processing Ultra-High- Speed Data from Superconducting Circuits

SBIR 第二阶段：用于处理超导电路超高速数据的解复用器

• 批准号: 9501322
• 负责人: Steven Kaplan
• 金额: $ 30万
• 依托单位: HYPRES, Inc.
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1995
• 资助国家: 美国
• 起止时间: 1995-10-01 至 1997-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9501322&HistoricalAwards=false
• 关键词: SBIR; Phase; II; Demultiplexer; Processing

9501322 Kaplan This Small Business Innovation Research (SBIR) Phase II project will develop a superconductive demultiplexer (demux) designed to slow the data stream from superconductive circuits and to serve as the interface with room-temperature circuits. Phase I successfully demonstrated a modular architecture that uses non-destructive read-out (NDRO) cells as well as a two-stage demux equipped with two NDRO cells. Phase II is expected to demonstrate a transient digitizer chip containing a flash analog-to-digital converter (ADC) and a number of demux units, which divert high-speed digital data into an appropriate number of lower-speed channels. Each demux output channel can be clocked at a rate low enough for room-temperature hardware to acquire and reconstruct the signal. This technology will exploit the inherent advantage of superconductive ADCs whose very large bandwidth is unmatched by semiconductor technology. A superconductive demux will permit superconductive chips to be incorporated in semiconducting system designs.

这个小型企业创新研究（SBIR）二期项目将开发一种超导解复用器（demux），旨在减缓来自超导电路的数据流，并作为室温电路的接口。第一阶段成功演示了一种模块化架构，该架构使用非破坏性读出（NDRO）单元以及配备两个NDRO单元的两级demux。第二阶段预计将演示一种瞬态数字化芯片，该芯片包含一个闪存模数转换器（ADC）和一些demux单元，这些单元将高速数字数据转移到适当数量的低速通道中。每个demux输出通道可以以足够低的速率进行时钟处理，以使室温硬件能够获取和重建信号。该技术将利用超导adc的固有优势，其非常大的带宽是半导体技术无法比拟的。超导demux将允许超导芯片被集成到半导体系统设计中。