A VLSI Design Laboratory Implemented in a Simulated Corporate Environment
A VLSI Design Laboratory Implemented in a Simulated Corporate Environment
批准号:
9551598
负责人:
Jennifer Ross
金额:
$2.4万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1995
资助国家:
美国
项目状态:
已结题
起止时间:
1995-08-01 至 1998-07-31
中文摘要
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英文摘要
This project is creating a new laboratory that involves students in all aspects of integrated circuit design and fabrication. The university is implementing the laboratory in a "simulated corporate environment" that emphasizes technical communication skills and teamwork for engineering students. In the laboratory students (1) gain hands-on experience with computer-aided design tools for designing integrated circuits; (2) fabricate designs through NSF-sponsored facilities (MOSIS); (3) conduct measurements on fabricated chips; (4) work in teams to achieve overall success; and (5) develop written, verbal, and e-mail communication skills. In the laboratory, students participate as "employees" of a VLSI design "company" working in different divisions to solve a common problem. The company framework is being created through local area network (LAN) of 10 Pentium-- based computers. This project is equipping the LAN with additional software to allow for circuit simulation, physical circuit layout, word processing, presentation, data analysis, and electronic mail. For the accurate measurement of fabricated chips and comparison of designed values, two pieces of additional test equipment are being added to pre-existing lab facilities. The "simulated corporate environment" was designed to prepare engineers for situations in the workplace, where they evaluate problems, define potential solutions, form plans of action, and communicate ideas to peers and superiors. This laboratory will be critically evaluated by students, faculty, and industry contacts to confirm its value in engineering education.
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