Experimenting with Concurrent Multithreaded Architectures for High-Performance Computing

本研究的重点是并发多线程体系结构的编译器和体系结构问题。 这些架构允许多个线程同时处于活动状态，以在单个机器周期中实现多个指令发布。 体系结构的研究重点是线程执行单元的设计，包括支持线程之间的通信，推测线程执行，线程流水线。 在功能和寄存器传输级的仿真将是这项研究的主要工具。 编译器的研究集中在线程级和指令级并行性的集成优化。 这项研究将在修改gcc编译器的背景下进行。 虽然线程可以用来允许多个独立的程序并发执行，但这个项目的主要焦点是加速单个程序的执行。

This research focuses on the compiler and architectural issues of concurrent multithreaded architectures. These architectures allow multiple threads to be active simultaneously to achieve multiple instruction issue in a single machine cycle. The architectural research focuses on the design of thread execution units that include support for communication between threads, for speculative thread execution, and for thread pipelining. Simulation at the functional and register-transfer levels will be the primary tool for this research. The compiler research focuses on integrating optimization for thread and instruction level parallelism. This research will take place in the context of modifications to the gcc compiler. While threads can be used to allow multiple independent programs to execute concurrently, the primary focus of this project is speeding up the execution of a single program.