PDS: Hybrid Technology Multi-Threaded Architecture

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This short-term research project will address the challenge of achieving near PetaOps scale performance within a decade through innovative systems that exhibit wide applicability and ease of use. The objective of the proposed research is to determine the feasibility and detailed structure of a parallel architecture integrating the combined capabilities of semiconductor, superconductor, and optical technologies. This hybrid architecture approach is motivated by the realization that a mix of technologies may yield superior operational attributes to those possible based solely on semiconductor technology in the same time frame. An interdisciplinary team of collaborators has been assembled to conduct the required point-design study in order to devise a complete system structure and evaluate its performance characteristics using a small set of scientific application kernels. The proposed hybrid technology approach exploits critical opportunities enabled by key emerging devices. Specifically computational performance can be dramatically improved through recent advances in Superconducting Rapid Single Flux Quantum logic which will make 100 Ghz clock rates feasible in the next two years. Memory capacity may be drastically increased through a new memory hierarchy, merging advanced semiconductor high density memory and future (admittedly more speculative) optical 3-D holographic storage capable of storing 0.1 Petabits or more. Interconnection bandwidth will be greatly enhanced by means of optical networks with 100 Gbps channels.