Collaborative Research: Fast Hardware Encryption

合作研究：快速硬件加密

• 批准号: 9909259
• 负责人: R. Mark Goresky
• 金额: $ 7.11万
• 依托单位: Institute For Advanced Study
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-03-01 至 2003-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9909259&HistoricalAwards=false
• 关键词: Collaborative; Research; Fast; Hardware; Encryption

High speed, high volume cryptographic systems will form the basis for the security of video, wireless,and computer communications of the next decade. This research involves the design and development of suchsystems, especially that of hardware-based stream ciphers. High speed hardware-based stream ciphers canbe easily manufactured, programmed, and implemented. They can be used to encrypt data (such as voice orvideo) in real time and are used as embedded components in cellular telephones, GPS satellites,radar, and radio systems. Most stream ciphers, however, have been found to be vulnerable to variouscryptoanalytic attacks. This research involves the development and analysis of new architectures forstream cipher generators which have all the above advantages but which are much more secure thantraditional architectures.Linear feedback shift registers have proven especially useful for the generation of pseudorandom sequencesfor high speed communications. They have been intensively studied for over forty years and theirusefulness does not appear to have any end in sight. Recently a fundamentally new architecture for feedbackshift registers was discovered, the so-called feedback-with-carry shift register or FCSR. Thisarchitecture shares all the advantages of the linear feedback architecture such as high speed and ease ofimplementation, but the resulting pseudorandom sequences are also more secure. This researchinvolves a number of implementation issues for the new architecture including (1) the development of parallel circuitry for high speed generation of pseudorandom sequences, (2) the design of combiners and feedforward functions to further increase the security of FCSR sequences, (3) the design of clock-controlled FCSR circuits, and (4) the analysis of the cryptographic security of the FCSR sequences which are generated in this way.

高速、大容量的加密系统将构成未来十年视频、无线和计算机通信安全的基础。 这项研究涉及此类系统的设计和开发，特别是基于硬件的流密码系统。 基于硬件的高速流密码可以轻松制造、编程和实施。 它们可用于实时加密数据（例如语音或视频），并用作蜂窝电话、GPS 卫星、雷达和无线电系统中的嵌入式组件。 然而，大多数流密码被发现容易受到各种密码分析攻击。 这项研究涉及流密码生成器新架构的开发和分析，该架构具有上述所有优点，但比传统架构安全得多。线性反馈移位寄存器已被证明对于生成高速通信的伪随机序列特别有用。 它们已经被深入研究了四十多年，而且它们的用处似乎没有尽头。 最近发现了一种全新的反馈移位寄存器架构，即所谓的反馈进位移位寄存器或 FCSR。 该架构具有线性反馈架构的所有优点，例如高速和易于实现，但产生的伪随机序列也更安全。 这项研究涉及新架构的许多实现问题，包括（1）用于高速生成伪随机序列的并行电路的开发，（2）组合器和前馈函数的设计以进一步提高FCSR序列的安全性，（3）时钟控制的FCSR电路的设计，以及（4）以此方式生成的FCSR序列的密码安全性分析。