Compiler Support for Advanced Computer Architectures

对高级计算机架构的编译器支持

• 批准号: 9974613
• 负责人: Charles Fischer
• 金额: $ 19万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-09-01 至 2003-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9974613&HistoricalAwards=false
• 关键词: Compiler; Support; Advanced; Computer; Architectures

Compiler Support for Advanced Computer ArchitecturesCompilers are essential to the spectacular advances in the speed of model microprocessors. To acccelerate programs, both compilers and microprocessors identify, and then hide, potential execution bottlenecks. Despite well-designed memory systems, placing and keeping needed data in the fastest locations is problematic. This proposal will investigate a number of compiler-based techniques that identify and hide or eliminate a variety of execution bottlenecks: (1) When memory delays are encountered, techniques that predict expected data values can be invoked. This allows computation based on predicted values during memory delays. Techniques that simultaneously handle of number of possible result values during memory delays will be studied. These techniques enhance the accuracy of predictions, utilizing effectively the computational resources of microcomputers.(2) Modern microprocessor designs extend the size and capabilities of registers (local memory). This proposal will enhance previous allocation results to handle extended register sets. Faster and more effective user programs will result.(3) Compilers improve program performance by identifying computations that are fixed (invariant) within a program. This proposal will extend compilers to handle nearly-invariant computations that span a limited range of values. Underutilized computational resources can be employed to anticipate and precompute such values.

编译器对高级计算机体系结构的支持对于模型微处理器速度的惊人进步，编译器是必不可少的。为了加速程序，编译器和微处理器都会识别并隐藏潜在的执行瓶颈。尽管设计了良好的存储系统，但将所需数据放置和保存在最快的位置是有问题的。该提案将研究一些基于编译器的技术，它们可以识别、隐藏或消除各种执行瓶颈：(1)当遇到内存延迟时，可以调用预测预期数据值的技术。这允许在内存延迟期间基于预测值进行计算。将研究在内存延迟期间同时处理多个可能结果值的技术。这些技术提高了预测的准确性，有效地利用了微型计算机的计算资源。(2)现代微处理器设计扩展了寄存器(本地存储器)的大小和能力。这一提议将增强以前的分配结果，以处理扩展寄存器集。(3)编译器通过识别程序中固定(不变)的计算来提高程序的性能。这一提议将扩展编译器以处理跨越有限范围的值的几乎不变的计算。未充分利用的计算资源可用于预测和预先计算这样的值。