Collaborative Research: Fast Hardware Encryption

摘要：高速、大容量的密码系统将为下一个十年的视频、无线和计算机通信的安全奠定基础。这项研究涉及到此类系统的设计和开发，特别是基于硬件的流密码的设计和开发。基于硬件的高速流密码易于制造、编程和实现。它们可用于实时加密数据(如语音或视频)，并用作蜂窝电话、GPS卫星、雷达和无线电系统的嵌入式组件。然而，大多数流密码被发现容易受到各种密码分析攻击。这项研究涉及开发和分析新的序列生成器体系结构，这些体系结构具有所有上述优点，但比传统体系结构更安全。线性反馈移位寄存器被证明在产生高速通信的伪随机序列方面特别有用。它们已经被深入研究了40多年，它们的用处似乎看不到任何尽头。最近，人们发现了一种全新的反馈移位寄存器体系结构，即所谓的反馈进位移位寄存器或FCSR。这种结构共享了线性反馈结构的所有优点，如高速和易于实现，并显着扩展了可产生和有用的序列的类别。这项研究涉及到一些新结构的实现问题，包括(1)高速产生伪随机序列的并行电路的开发，(2)提高FCSR序列安全性的组合器和前馈函数的设计，(3)时钟控制FCSR电路的设计，以及(4)以这种方式产生的FCSR序列的密码安全性分析。

Abstract:High speed, high volume cryptographic systems willform the basis for the security of video, wireless,and computer communications of the next decade. Thisresearch involves the design and development of suchsystems, especially that of hardware-based streamciphers. High speed hardware-based stream ciphers canbe easily manufactured, programmed, and implemented.They can be used to encrypt data (such as voice orvideo) in real time and are used as embeddedcomponents in cellular telephones, GPS satellites,radar, and radio systems. Most stream ciphers,however, have been found to be vulnerable to variouscryptoanalytic attacks. This research involves thedevelopment and analysis of new architectures forsequence generators which have all the aboveadvantages but which are much more secure thantraditional architectures. They are also potentiallyuseful for a variety of other applications such assonar systems and Monte Carlo integration.Linear feedback shift registers have proven especiallyuseful for the generation of pseudorandom sequencesfor high speed communications. They have beenintensively studied for over forty years and theirusefulness does not appear to have any end in sight.Recently a fundamentally new architecture for feedbackshift registers was discovered, the so-calledfeedback-with-carry shift register or FCSR. Thisarchitecture shares all the advantages of the linearfeedback architecture such as high speed and ease ofimplementation and significantly expands the class ofeasily generated and useful sequences. This researchinvolves a number of implementation issues for the newarchitecture including (1) the development of parallelcircuitry for high speed generation of pseudorandomsequences, (2) the design of combiners and feedforwardfunctions to increase the security of FCSR sequences, (3) the design of clock-controlled FCSR circuits, and (4) the analysis of the cryptographic security of the FCSR sequences which are generated in this way.