Ir02/(Ba,Sr)Ti03/Pt Storage Cells for 4 GBit DRAMs and Beyond: Ir, BST, and Selective Pt MOCVD and Interfacial Phenomena

具有高介电常数的SANDIP DeyECS-0000121钛酸锶(Ba，Sr)TiO_3或BST薄膜正在被考虑用于许多应用，包括用于4、16和千兆(GB)动态随机存取存储器(DRAM)的电荷存储单元。实现具有长刷新时间的GB DRAM取决于通过可制造的金属-有机化学气相沉积(MOCVD)工艺在硅上制造电可靠的沟槽IrO2/(Ba，Sr)TiO3/Pt存储单元。目前，我们实验室的研究主要集中在Ir、Pt和BST的MOCVD以及纳米结构的演化、电学表征和界面模拟等方面。一个尚未解决的关键问题可能最终决定刷新时间，那就是缺乏对界面空间电荷对沟槽电容器的暂态电流和介电色散的影响的了解。因此，为了实现机械上坚固的、满足4Gbit DRAM单元的几何和电气要求的沟槽测试单元，将实施系统的和垂直集成的程序来：a)通过顺序地通过MOCVD和/或溅射沉积铂来在TaxSiyNz钝化的多晶硅塞上制造沟槽IrO2/(BST)/Pt测试单元，(Ii)通过MOCVD的共形BST，随后对BST进行光刻、刻蚀和聚焦离子束(FIB)研磨，以定义一个4Gbit单元的几何形状，以及(Iii)通过MOCVD的共形IR随后其氧化、光刻、光刻B)用频域和时间域技术定量地确定了测试沟槽肖特基BST/铂界面的空间电荷分布及其与暂态电流和介电色散的关系；c)通过响应面分析，根据电学特性的反馈，优化了BST MOCVD参数；制造具有所需电性能的单元集成上述想法以制造下一代存储单元将是具有挑战性的，但具有新颖性，这些概念很可能扩展到GB的水平。成功的结果将为制造具有更长刷新时间的存储单元提供解决方案。亚利桑那州立大学(亚利桑那州立大学)是启动这样一个激动人心的研究计划的合适地点。在过去的十年里，该研究所开展了对电介质和金属的MOCVD以及钙钛矿型薄膜中的界面现象的研究。跨学科的方法将在一个重要的技术领域培训人才，这样他们就可以在完成后将他们的科学和工程技能应用于美国的工业和研究实验室。

Sandip DeyECS-0000121Barium strontium titanate, (Ba, Sr)TiO3 or BST, films with high permittivity are being considered for numerous applications including charge storage cells for 4, 16, and 64 gigabit (Gb) dynamic random access memories (DRAMs). The realization of Gb DRAMs with long refresh times is contingent upon the fabrication of electrically-reliable, trench IrO2/(Ba, Sr)TiO3/Pt storage cells on Si by manufacturable, metal-organic chemical vapor deposition (MOCVD) processes. Currently, the research efforts of our laboratory are focused on MOCVD of Ir, Pt, and BST, coupled with nanostructure evolution, electrical characterization, and modeling of interfaces. A critical issue that remain unresolved, which may eventually determine the refresh time, is the lack of understanding of the effects of interfacial space charge on the transient current and dielectric dispersion of the trench capacitor. Therefore, to realize mechanically robust, trench test cells, satisfying the geometric and electrical requirements of a 4 Gbit DRAM cell, a systematic and vertically-integrated program will be implemented to:a) fabricate trench IrO2/(BST)/Pt test cells on TaxSiyNz-passivated poly-Si plugs by sequential deposition of (i) Pt by MOCVD and/or sputtering, (ii) conformal BST by MOCVD, followed by photolithography, etching, and focused ion beam (FIB) milling of BST to define the geometry of one 4 Gbit cell, and (iii) conformal Ir by MOCVD followed by its oxidation, photolithography, and etchingb) quantitatively determine the space charge distribution at the Schottky BST/Pt interface in a test trench and its relationship to transient current, and dielectric dispersion by frequency and time domain techniquesc) optimize BST MOCVD parameters, from feedback of electrical characterization, by response surface analyses; fabricate cells with the required electrical performanceThe integration of the aforementioned ideas to fabricate the next generation of storage cells will be challenging but novel, and the concepts may well be extended to the 64 Gb level. A successful outcome will provide a solution for fabricating storage cells with longer refresh times. Arizona State University (ASU) is the appropriate place to initiate such an exciting research program. The PI has carried out research on MOCVD of dielectrics and metals, and interfacial phenomena in perovskite films over the last decade. An interdisciplinary approach will train personnel in a technologically important area, so that they can apply their science and engineering skills in the US industries and research laboratories upon completion.