One Hour Ahead Computation of Large-Scale Electric Power Network Transport Capability

大规模电力网络输送能力提前一小时计算

• 批准号: 0085717
• 负责人: Robert Thomas
• 金额: $ 9万
• 依托单位: Cornell University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-09-01 至 2002-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0085717&HistoricalAwards=false
• 关键词: Hour; Ahead; Computation; Large; Scale

This award is made under the Exploratory Research on Engineering the Transport Industries (ETI) program solicitation. This research involves the development of a scalable special-purpose hybrid computing architecture comprising fine-grained parallel analog processing and digital control and reconfigurability to accelerate the computation of large-scale electric power network transfer capacity. The research in this one-year exploratory program will proceed concurrently along three lines. First, the core analog computational units needed to solve the steady-state power-flow problem will be designed, simulated, fabricated, and tested experimentally to determine their potential accuracy and computational throughput. Second, the parallel analog solution method will be developped and refined through simulation. Third, work on a scalable architecture will be initiated. The architecture should support digital reconfigurability as well as the control, communications, and data storage needed for the solution of large-scale network problems. If this research is successful, it could result eventually in the development of a specialized chip set or an accelerator board that would interface with an engineering workstation and could perform a near real-time solution of the steady-state power-flow equations. Such an accelerator board would be something like the specialized graphics cards that are widely for used for accelerating compute-intensive computer graphics tasks.

该奖项是根据探索性研究工程运输行业（ETI）计划征集。 这项研究涉及到一个可扩展的专用混合计算架构的发展，包括细粒度的并行模拟处理和数字控制和可重构性，以加速大规模电力网络传输容量的计算。 这项为期一年的探索性计划的研究将沿着沿着三条路线进行。 首先，解决稳态功率流问题所需的核心模拟计算单元将被设计、仿真、制造和实验测试，以确定其潜在的精度和计算吞吐量。 第二，通过仿真，发展和完善并行模拟求解方法。 第三，将启动可扩展架构的工作。 该架构应支持数字可重构性以及解决大规模网络问题所需的控制、通信和数据存储。 如果这项研究成功，它可能最终导致开发一个专用芯片组或加速器板，该芯片组或加速器板将与工程工作站接口，并可以执行稳态功率流方程的近实时解。 这种加速器板类似于专门的图形卡，广泛用于加速计算密集型计算机图形任务。