CAREER: An Integrated Approach to Fault Tolerance in Discrete-Time Dynamic Systems

职业生涯：离散时间动态系统容错的综合方法

• 批准号: 0092696
• 负责人: Christoforos Hadjicostis
• 金额: $ 37.5万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2001
• 资助国家: 美国
• 起止时间: 2001-02-15 至 2007-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0092696&HistoricalAwards=false
• 关键词: CAREER; Integrated; Approach; Fault; Tolerance

As the complexity of dynamic systems and networks grows through the continuous deployment of embedded systems and the availability of novel sensor and actuator technologies, the likelihood of temporal or permanent failures at certain components or communication links increases significantly and the consequences can become highly unpredictable and severe. Even within a single digital device, the reduction of voltages and capacitances, the shrinking of transistor sizes and the sheer number of gates involved has led to a significant increase in the frequency of so-called "soft-errors," and has prompted leading semiconductor manufactures to admit that they may be facing difficult challenges in future. The occurrence of failures becomes a major concern when the systems involved are life-critical (such as military, transportation or medical systems), or operate in remote or inaccessible environments (where repair may be difficult or even impossible). The synergistically developed research and educational programs of this project aim at obtaining systematic approaches for modeling, detecting, identifying and correcting failures in order to ensure the proper functionality of discrete-time dynamic systems or networks. Unlike traditional control where the goal is to stabilize a given dynamic system (while perhaps maintaining some sort of optimality in the applied control input), a fault-tolerant design aims at ensuring that any deviation from the expected system behavior is confined within a small time interval (usually one discrete-time step).In addition, the designer of a fault-tolerant system needs to account for the possibility of failures in the sensors or communications links, or even in error detecting/correcting mechanism itself. This project takes a system-theoretic viewpoint towards the design of fault-tolerant dynamic systems. The main goals are to obtain resource-efficient fault-tolerant implementations and to characterize their fundamental limitations by jointly exploiting system-, coding-and information-theoretic techniques.

随着动态系统和网络的复杂性通过嵌入式系统的持续部署以及新型传感器和执行器技术的可用性而增长，某些组件或通信链路的暂时或永久故障的可能性显着增加，并且后果可能变得高度不可预测和严重。 即使在单个数字设备中，电压和电容的降低、晶体管尺寸的缩小以及所涉及的门的绝对数量也导致了所谓的“软错误”频率的显著增加，并促使领先的半导体制造商承认他们可能在未来面临困难的挑战。 当所涉及的系统是生命攸关的（例如军事、运输或医疗系统），或在偏远或无法进入的环境中运行时（在这些环境中，维修可能很困难甚至不可能），故障的发生就成为一个主要问题。 该项目的协同开发的研究和教育计划旨在获得建模，检测，识别和纠正故障的系统方法，以确保离散时间动态系统或网络的正常功能。 与传统控制不同，传统控制的目标是稳定给定的动态系统容错设计的目标是确保与预期系统行为的任何偏差都被限制在一个小的时间间隔内（通常是一个离散时间步长）。此外，容错系统的设计者需要考虑传感器或通信链路中的故障的可能性，或者甚至错误检测/校正机制本身中的故障的可能性。本计画以系统论观点探讨容错动态系统之设计。 主要目标是获得资源有效的容错实现，并通过联合利用系统，编码和信息理论技术来表征其基本局限性。