CAREER: An Integrated Approach to Fault Tolerance in Discrete-Time Dynamic Systems

随着嵌入式系统的不断部署以及新型传感器和执行器技术的可用性，动态系统和网络的复杂性不断增长，某些组件或通信链路暂时或永久故障的可能性显着增加，其后果可能变得高度不可预测和严重。即使在单个数字设备中，电压和电容的降低、晶体管尺寸的缩小以及所涉及的栅极数量的增加，也导致了所谓“软误差”频率的显著增加，并促使领先的半导体制造商承认，他们可能在未来面临着艰巨的挑战。当所涉及的系统对生命至关重要（如军事、运输或医疗系统），或在远程或难以进入的环境中运行（在这些环境中，维修可能很困难，甚至不可能）时，故障的发生就成为一个主要问题。该项目协同发展的研究和教育计划旨在获得系统的建模、检测、识别和纠正故障的方法，以确保离散时间动态系统或网络的正常功能。传统控制的目标是稳定给定的动态系统（同时可能在应用的控制输入中保持某种最优性），与传统控制不同，容错设计旨在确保对预期系统行为的任何偏差被限制在很小的时间间隔内（通常是一个离散时间步骤）。此外，容错系统的设计者需要考虑传感器或通信链路甚至错误检测/纠错机制本身发生故障的可能性。本课题从系统论的角度研究动态容错系统的设计。主要目标是获得资源高效的容错实现，并通过联合利用系统、编码和信息论技术来描述它们的基本局限性。

As the complexity of dynamic systems and networks grows through the continuous deployment of embedded systems and the availability of novel sensor and actuator technologies, the likelihood of temporal or permanent failures at certain components or communication links increases significantly and the consequences can become highly unpredictable and severe. Even within a single digital device, the reduction of voltages and capacitances, the shrinking of transistor sizes and the sheer number of gates involved has led to a significant increase in the frequency of so-called "soft-errors," and has prompted leading semiconductor manufactures to admit that they may be facing difficult challenges in future. The occurrence of failures becomes a major concern when the systems involved are life-critical (such as military, transportation or medical systems), or operate in remote or inaccessible environments (where repair may be difficult or even impossible). The synergistically developed research and educational programs of this project aim at obtaining systematic approaches for modeling, detecting, identifying and correcting failures in order to ensure the proper functionality of discrete-time dynamic systems or networks. Unlike traditional control where the goal is to stabilize a given dynamic system (while perhaps maintaining some sort of optimality in the applied control input), a fault-tolerant design aims at ensuring that any deviation from the expected system behavior is confined within a small time interval (usually one discrete-time step).In addition, the designer of a fault-tolerant system needs to account for the possibility of failures in the sensors or communications links, or even in error detecting/correcting mechanism itself. This project takes a system-theoretic viewpoint towards the design of fault-tolerant dynamic systems. The main goals are to obtain resource-efficient fault-tolerant implementations and to characterize their fundamental limitations by jointly exploiting system-, coding-and information-theoretic techniques.