Production-Oriented VDDT and IDDQ Device Testing Methods Based on Multiple Power Supply Pad Measurements

基于多个电源焊盘测量的面向生产的 VDDT 和 IDDQ 器件测试方法

• 批准号: 0098300
• 负责人: James Plusquellic
• 金额: $ 31.83万
• 依托单位: University of Maryland Baltimore County
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2001
• 资助国家: 美国
• 起止时间: 2001-07-01 至 2005-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0098300&HistoricalAwards=false
• 关键词: Production; Oriented; VDDT; IDDQ; Device

The International Technology Roadmap for Semiconductors identifies a need for innovative testing and diagnostic methods for digital and mixed-signal devices. Traditional testing strategies are becoming less effective for several reasons. As device operational frequencies increase, the cost of functional test equipment, capable of testing devices at their native speed (at-speed), is becoming cost prohibitive. Testing methods which use slower, cheaper test equipment need to be able to detect defects that cause at-speed delay failures. The increasing complexity and diversity of these devices also make it difficult to access internal nodes and achieve good fault coverage and parametric device information. Technology trends, such as increases in device leakage currents, have reduced the effectiveness of alternative tests such as IDDQ. This research is designed to address these short-coming by investigating device transient and novel quiescent signal techniques. In previous work, process-tolerant VDDT and IDDQ methods have been demonstrated to (1) detect resistive shorting and open defects, (2) predict performance in defect-free devices, and (3) predict defect location in defective devices. These methods are based on the cross-correlation of multiple static and transient power supply signals. Cross-correlation is used to calibrate for process and technology-related variations, such as shifts in transistor betas and increases in leakage current. This research focuses on the implementation of these techniques in a production test environment, and on identifying their capabilities and limitations. The scalability of the methods to large commercial devices is investigated with industrial partners. Production test environment issues, such as measurement noise and instrumentation sampling requirements, test generation strategies and specialized hardware are also investigated.

国际半导体技术路线图确定了对数字和混合信号器件的创新测试和诊断方法的需求。由于几个原因，传统的测试策略正变得不那么有效。随着设备工作频率的增加，能够以其固有速度（at-speed）测试设备的功能测试设备的成本正变得令人望而却步。使用较慢、较便宜的测试设备的测试方法需要能够检测到导致高速延迟故障的缺陷。这些设备的复杂性和多样性也使得访问内部节点和获得良好的故障覆盖和参数化设备信息变得困难。技术趋势，如器件泄漏电流的增加，降低了IDDQ等替代测试的有效性。本研究旨在通过研究器件瞬态和新的静态信号技术来解决这些缺点。在之前的工作中，过程容忍VDDT和IDDQ方法已被证明可以(1)检测电阻性短路和开路缺陷，(2)预测无缺陷器件的性能，以及(3)预测缺陷器件的缺陷位置。这些方法基于多个静态和暂态电源信号的相互关系。相互关联用于校准过程和技术相关的变化，例如晶体管β的变化和泄漏电流的增加。本研究的重点是在生产测试环境中实现这些技术，并确定它们的能力和局限性。与工业伙伴一起研究了这些方法在大型商用设备上的可扩展性。生产测试环境问题，如测量噪声和仪器采样要求，测试生成策略和专用硬件也进行了研究。