Increasing Parallel Program Performance with the LC Memory Consistency Model

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This research takes a significant step towards enabling and evaluating the application of compileroptimizations for uniprocessor performance within explicitly parallel programs, with a flexible viewof memory consistency. Two important unanswered questions are targeted: (1) What kind of performance can be gained with the Location Consistency (LC) memory model in comparisonto the sequential consistency (SC)-derived models for shared memory parallel programs,amidst the new developments of compiler analysis and optimization for SC-derived models?(2) As a compromise between the two divergent approaches, can both the SC-derived models and the LC model be supported within the same program, by developing a programmer-controlled memory consistency strategysupported by compiler technology?The resultswill include:(1) specification and implemenation of a programming model that assumes an end-to-end view of the memory system based on the LC model, and a study of its programmability,(2) compilation analyses to uphold programmer-controlled memory consistency so programmers can choose between the memory models in different parts of the same application,(3) development and refinement of cache consistency protocols based on the LC model in a software caching context,(4) experimental evaluation of compiler optimization and program performance underdifferent memory consistency models and cache protocols.