ITR: Cache-Resident Databases

ITR：缓存驻留数据库

• 批准号: 0205544
• 负责人: Anastassia Ailamaki
• 金额: --
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2002
• 资助国家: 美国
• 起止时间: 2002-09-01 至 2008-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0205544&HistoricalAwards=false
• 关键词: ITR; Cache; Resident; Databases

AbstractDatabases are at the very heart of the information economy. Databaseperformance is a driving factor that dictates what is possible through theuse of information technology. While database management systems haveevolved since they were invented several decades ago, their current designis unfortunately antiquated given the state-of-the-art computer memoryhierarchies of today (and even more so tomorrow). This project seeks toalleviate this problem.While processor speeds double every year, memory access speeds follow amuch shallower improvement curve. To bridge this speed gap, small, fastmemories called caches are used to hold frequently accessed data andinstructions close to the processor. When executing database workloads,accesses often miss in the (fast) cache and access the (slow) memory,thereby reducing performance significantly. Hardware approaches aretypically limited by access time constraints and by applicability to a widerange of workloads. To keep the hardware design feasible, caches typicallyuse simplistic data placement and replacement schemes, and are oblivious tothe memory access behavior of the application.Cache-conscious software methods are, on the contrary, extremely promising.The proposed algorithms collect data statistics in order to correctly groupdata with similar usage patterns and optimize cache utilization. Bycarefully observing behavior, data is prefetched into the cache before itis used. Preliminary results demonstrate that these techniques (i) minimizethe number of misses in the cache and (ii) significantly reduce theincurred penalties.

摘要数据库是信息经济的核心。数据库性能是一个驱动因素，它决定了通过使用信息技术可以实现什么。虽然数据库管理系统自几十年前发明以来一直在发展，但不幸的是，考虑到今天(明天更是如此)最先进的计算机存储器层次结构，它们目前的设计已经过时了。这个项目试图缓解这个问题。虽然处理器的速度每年都会翻一番，但内存访问速度的改善曲线要浅得多。为了弥合这一速度差距，被称为高速缓存的小而快速的存储器被用来在处理器附近保存频繁访问的数据和指令。在执行数据库工作负载时，访问经常在(快速)缓存中未命中，并访问(慢)内存，从而显著降低性能。硬件方法通常受到访问时间限制和对更大范围工作负载的适用性的限制。为了保持硬件设计的可行性，缓存通常使用简单的数据放置和替换方案，并且不考虑应用程序的内存访问行为。相反，具有缓存意识的软件方法非常有希望。所提出的算法收集数据统计信息，以便正确地分组具有相似使用模式的数据，并优化缓存利用率。通过仔细观察行为，数据在使用之前被预取到缓存中。初步结果表明，这些技术(I)最大限度地减少了高速缓存中的未命中次数，并且(Ii)显著地减少了所引起的惩罚。