ITR: Prototyping Multithreaded Systems

ITR：多线程系统原型设计

• 批准号: 0220138
• 负责人: Oyekunle Olukotun
• 金额: $ 20万
• 依托单位: Stanford University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2002
• 资助国家: 美国
• 起止时间: 2002-09-01 至 2005-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0220138&HistoricalAwards=false
• 关键词: ITR; Prototyping; Multithreaded; Systems

The goal of the proposed research is to develop a multithreaded prototyping environment that allows hardware and software experimentation with fine-grain and speculative multithread chip multiprocessor (CMP) architectures. This environment will allow the analysis of single-chip fine-grain threaded systems at full hardware speeds in a much more flexible manner than is possible today with software simulation, and will be the first hardware implementation to execute speculatively multithreaded applications. This environment would be used to investigate threaded applications much more efficiently and thoroughly than any other system existing today. The prototyping environment will be built without doing any VLSI design. The key idea is that by combining ten-year-old microprocessor chips with state-of-the-art FPGA chips it is possible to build a single-board multiprocessor prototyping environment that provides support for thread level speculation (TLS) and operates at hardware speeds, yet has the latency and bandwidth characteristics equivalent to a modern CMP architecture. Such an environment will be ideal for architecture and software research on multithreaded microprocessors

建议的研究的目标是开发一个多线程原型环境，允许硬件和软件实验细粒度和投机性多线程芯片多处理器（CMP）架构。这种环境将允许在全硬件速度下以比今天的软件仿真更灵活的方式分析单芯片细粒度线程系统，并且将是第一个执行推测性多线程应用程序的硬件实现。 这种环境将被用来研究线程应用程序，比目前存在的任何其他系统都要有效和彻底得多。原型环境将建立没有做任何VLSI设计。其核心思想是，通过将已有十年历史的微处理器芯片与最先进的FPGA芯片相结合，可以构建一个单板多处理器原型环境，该环境支持线程级推测（TLS）并以硬件速度运行，但具有与现代CMP架构相当的延迟和带宽特性。这样的环境对于多线程微处理器的体系结构和软件研究将是理想的