ITR: Prototyping Multithreaded Systems

提出的研究目标是开发一个多线程原型环境，允许对细粒度和推测的多线程芯片多处理器（CMP）架构进行硬件和软件实验。这种环境将允许在全硬件速度下以比现在的软件模拟更灵活的方式分析单芯片细粒度线程系统，并且将是第一个执行推测性多线程应用程序的硬件实现。这个环境将比目前现有的任何其他系统更有效、更彻底地用于研究线程应用程序。原型环境将在不做任何VLSI设计的情况下构建。关键思想是，通过将已有十年历史的微处理器芯片与最先进的FPGA芯片相结合，有可能构建一个单板多处理器原型环境，该环境提供对线程级别推测（TLS）的支持，并以硬件速度运行，但具有相当于现代CMP架构的延迟和带宽特性。这样的环境对于多线程微处理器的架构和软件研究是理想的

The goal of the proposed research is to develop a multithreaded prototyping environment that allows hardware and software experimentation with fine-grain and speculative multithread chip multiprocessor (CMP) architectures. This environment will allow the analysis of single-chip fine-grain threaded systems at full hardware speeds in a much more flexible manner than is possible today with software simulation, and will be the first hardware implementation to execute speculatively multithreaded applications. This environment would be used to investigate threaded applications much more efficiently and thoroughly than any other system existing today. The prototyping environment will be built without doing any VLSI design. The key idea is that by combining ten-year-old microprocessor chips with state-of-the-art FPGA chips it is possible to build a single-board multiprocessor prototyping environment that provides support for thread level speculation (TLS) and operates at hardware speeds, yet has the latency and bandwidth characteristics equivalent to a modern CMP architecture. Such an environment will be ideal for architecture and software research on multithreaded microprocessors