Integrity Monitoring and Recovery Techniques for Next Generation Submicron Microprocessors

下一代亚微米微处理器的完整性监控和恢复技术

• 批准号: 0311061
• 负责人: Arun Somani
• 金额: --
• 依托单位: Iowa State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-08-01 至 2008-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0311061&HistoricalAwards=false
• 关键词: Integrity; Monitoring; Recovery; Techniques; Next

Integrity Monitoring and Recovery Techniques for Error-Prone Submicron MicroprocessorsAs advances in VLSI technology reduce circuit dimensions dramatically, processor chips become more vulnerable to soft errors. Thus dependability is becoming an increasingly important quality measure of microprocessors. A transient and/or permanent processor failure could have diverse impacts on our daily lives. The goals of the proposed research are: (1) to characterize soft error behavior on commercial microprocessors through fault injection experiments; (2) to provide a guideline for exploiting soft error susceptibility in integrity checking strategy and predicting the error characteristics from the processor's architecture; and (3) to develop comprehensive micro-architectural solutions.We will investigate individual components of the processor with circuit-level approaches. Subsequently, we will study the area overhead vs. fault coverage trade-off to show the effectiveness of our proposed solutions. We will be developing specific tailored dependability solutions that are independent of technology and based on fault occurrence and error propagation characteristics of a given processor architecture. The techniques are easily adapted to future generations of architectures.Since use of microprocessors and micro controllers is very wide spread and affects every aspect of our lives, improvement in the dependability of such systems would have the widest possible broader impact.

易出错的亚微米微处理器的完整性监测和恢复技术随着超大规模集成电路技术的进步，电路尺寸大大减小，处理器芯片更容易受到软错误的影响。因此，可靠性正成为微处理器日益重要的质量衡量标准。一个短暂和/或永久的处理器故障可能会对我们的日常生活产生各种各样的影响。提出的研究目标是：(1)通过故障注入实验表征商用微处理器的软错误行为；(2)为利用完整性检查策略中的软错误敏感性和从处理器结构预测错误特征提供指导；(3)制定综合微建筑解决方案。我们将用电路级的方法研究处理器的各个组件。随后，我们将研究区域开销与故障覆盖的权衡，以显示我们提出的解决方案的有效性。我们将开发特定的量身定制的可靠性解决方案，这些解决方案独立于技术，并基于给定处理器架构的故障发生和错误传播特征。这些技术很容易适应未来的体系结构。由于微处理器和微控制器的使用非常广泛，影响着我们生活的方方面面，因此提高这些系统的可靠性将产生尽可能广泛的影响。