ITR: Collaborative Research: A Multi-Level Approach to Power-Efficient Opto-Electronic Interconnection Networks
ITR:协作研究:高效光电互连网络的多层次方法
基本信息
- 批准号:0325228
- 负责人:
- 金额:--
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2003
- 资助国家:美国
- 起止时间:2003-09-01 至 2007-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Abstract:Interconnection network fabrics are becoming an ever-more critical communication backbone of many digital systems, providing the means for systems to scale up in capacity. As these systems become power-constrained, networks stand to be the weakest link, unless there is a shift from prior performance-driven approaches to one that focuses on the power efficiency of networks.This project takes a multi-level approach to power-efficient interconnection networks that synergistically bridges research in circuits, architecture and software, providing a complete solution that will make power-aware network fabrics a reality. Research into novel low-power circuit techniques develops basic network building blocks for newpower-efficient network architecture designs. New link and switch mechanisms uncovered at the circuit-level are leveraged for run-time architectural tradeoffs in network power and performance. Higher up in the hierarchy, the software level closest to users analyzes and factors in user power-performance requirements.This research targets a diverse range of systems -- (1) both general-purpose and embedded systems; (2) both electrical and optical networking technologies, seeking to determine the optimal choice between optical versus electrical interconnection at each level in the network hierarchy from a power perspective; (3) from tiny on-chip networks todata center-wide chassis-to-chassis networks.The research is integrated into the education curriculum, through existing and new graduate courses, and in undergraduate research programs. The project seeks to further broaden the participation of underrepresented groups in research activities. As a pioneering effort inpower-efficient interconnection networks, the project seeks tofacilitate future research and education in this area through the release of simulation tools and other results.
翻译后摘要:互连网络结构正在成为一个越来越重要的通信骨干,许多数字系统,提供了系统的能力扩大的手段。随着这些系统变得功率受限,网络将成为最薄弱的环节,除非从以前的性能驱动方法转向关注网络的功率效率。该项目采用多层次的方法来实现高功率效率的互连网络,协同连接电路,架构和软件的研究,提供一个完整的解决方案,使功率感知网络结构成为现实。对新型低功耗电路技术的研究为新型节能网络架构设计开发了基本的网络构建模块。新的链路和开关机制,在电路级发现的运行时架构的网络功率和性能的权衡。本研究针对不同的系统--(1)通用系统和嵌入式系统;(2)电气和光学网络技术,从功率的角度寻求确定网络层次结构中每一级的光学互连与电气互连之间的最佳选择;(3)从微小的片上网络到数据中心范围的机箱到机箱网络。该研究通过现有和新的研究生课程以及本科生研究计划融入教育课程。该项目旨在进一步扩大代表性不足的群体对研究活动的参与。作为节能互连网络的一项开创性工作,该项目旨在通过发布仿真工具和其他成果来促进该领域未来的研究和教育。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Gu-Yeon Wei其他文献
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
- DOI:
10.1007/s10470-015-0624-x - 发表时间:
2015-08-30 - 期刊:
- 影响因子:1.400
- 作者:
Hayun Chung;Zeynep Toprak Deniz;Alexander Rylyakov;John Bulzacchelli;Daniel Friedman;Gu-Yeon Wei - 通讯作者:
Gu-Yeon Wei
A view of the sustainable computing landscape
- DOI:
10.1016/j.patter.2025.101296 - 发表时间:
2025-07-11 - 期刊:
- 影响因子:7.400
- 作者:
Benjamin C. Lee;David Brooks;Arthur van Benthem;Mariam Elgamal;Udit Gupta;Gage Hills;Vincent Liu;Linh Thi Xuan Phan;Benjamin Pierce;Christopher Stewart;Emma Strubell;Gu-Yeon Wei;Adam Wierman;Yuan Yao;Minlan Yu - 通讯作者:
Minlan Yu
Gu-Yeon Wei的其他文献
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{{ truncateString('Gu-Yeon Wei', 18)}}的其他基金
I-Corps: Algorithm-Hardware Co-Design for Large-Scale Machine Learning
I-Corps:大规模机器学习的算法硬件协同设计
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2137080 - 财政年份:2021
- 资助金额:
-- - 项目类别:
Standard Grant
S&AS: INT: RoboBees 2.0 Towards Autonomous Micro Air Vehicles
S
- 批准号:
1724197 - 财政年份:2017
- 资助金额:
-- - 项目类别:
Standard Grant
InTrans: A virtualized SoC platform architecture for mini autonomous drones
InTrans:适用于小型自主无人机的虚拟化 SoC 平台架构
- 批准号:
1551044 - 财政年份:2015
- 资助金额:
-- - 项目类别:
Standard Grant
Flexible Voltage Stacking for Chip Multiprocessors
芯片多处理器的灵活电压堆叠
- 批准号:
0903437 - 财政年份:2009
- 资助金额:
-- - 项目类别:
Standard Grant
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