Flexible Voltage Stacking for Chip Multiprocessors

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Effective management of supply voltage is of critical importance to overcome power limitations in future highly parallel multi-core microprocessors. This project proposes a new approach to efficiently deliver power and manage voltage in chip multiprocessors through a technique, called flexible voltage stacking. Voltage stacking involves delivering a higher supply voltage to the chip (resulting in lower current draw for a fixed power budget), which can reduce IR losses and improve power delivery efficiency. By providing flexibility to the stack, individual cores can be stacked in such a way as to regulate the voltage to the desired core supply level. The PIs plan to explore a range of architectural and circuit techniques to mitigate issues related to voltage noise. Also, a prototype chip will be designed demonstrating the flexible voltage stack concept, driven by realistic workload traces from a combined software/FPGA simulator of a multicore system. The work will have broader impacts through technology transfer to the computing industry and by providing training for both undergraduate and graduate students.