ITR: Architectures and Design Methodologies for Secure Low-Power Embedded Systems

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Embedded systems, for example in information appliances and networkedsensors, face some of the most demanding security concerns - they are resourceconstrained while frequently needing to handle sensitive information inphysically insecure environments. Security processing can easily overwhelm thelimited computation and memory resources of embedded processors, especially withthe escalation in the amount of data to be processed and the data rates ofhigh-speed networks. This "performance gap" is compounded by the "battery gap",which is the disparity between energy requirements and slow improvements inbattery technology, for secure low-power embedded systems. This project is an inter-disciplinary study of several core technologiesthat will enable the design of secure, low-power embedded systems. It spans thefields of security, cryptographic algorithms, embedded processor architecture,computer arithmetic, low power design, and enabling design methodologies andtools. It addresses the performance, energy and security requirements, andtheir tradeoffs, in embedded processors and systems. The research goals includea comprehensive analysis of the performance requirements and power consumptionfor security in embedded systems. The project is developing efficient architecturesfor security processing in low-power embedded systems, including configurablesecurity modules for system-on-chip designs, and architectural guidelines fortiny cryptographic processors for embedded systems. The performance, power andsecurity tradeoffs based on customizations at the protocol, cryptographicalgorithm, and hardware and software implementation levels are studied. Designmethodology and tools include processor design tools to facilitate the design ofnew security processing architectures based on open frameworks such as the PLX(hosted at Princeton) and SimpleScalar toolkits. The project exploresdomain-specific design methodologies that jointly co-design security protocolsand processing architectures to meet the required security, performance andpower priorities and constraints. The research enables the design of embedded systems with higher levels ofsecurity, while achieving an order of magnitude or more in performance andbattery life, compared to conventional approaches. Broad security impacts are expected for embedded system design, in addition to impact for future research and education. Results are disseminated to industry through the Princeton Architecture Lab for Multimedia and Security (PALMS) and the NJCST Center for Embedded System-on-a-Chip Design. The research results are being woven into graduate and undergraduate courses.