FET: SHF: Small: Collaborative: Advanced Circuits, Architectures and Design Automation Technologies for Energy-efficient Single Flux Quantum Logic

现在，几乎所有人都认识到，世界经济对计算机节能操作的严重依赖。为此，“Beyond-Cmos”器件技术和相应逻辑系列的进步现在被视为迈向高性能计算下一次重大飞跃的关键一步。这项研究中描述的挑战和机遇为开发前景非常光明的“Beyond-Cmos”技术的许多方面提供了方向，这种技术可以产生极高性能但节能的计算系统，从而确保信息技术生态系统的可持续性。基于约瑟夫森结(JJ)单磁通量子(SFQ)逻辑单元的超导电子(SCE)已经发展成为一种触手可及的“Beyond-Cmos”技术，开关速度在数百GHz，每次跃迁的能量消耗不超过10^-19焦耳。该项目将通过为各种计算结构生产超高性能和高能效的电子产品来增加商业和社会机会，在此过程中，还将通过将本科生、研究生和代表性不足的学生纳入计划中的研究，为提高美国的技术能力做出贡献。这项研究的目的是在先进电路、架构和设计自动化技术的发展方面取得重大进展，以支持大规模超导SFQ数字电子产品，以满足未来高能效、高性能大规模计算系统的需求。对设计自动化的研究将使大规模的SCE系统集成成为可能。本研究针对直流供电的高能效快速SFQ和交流供电的绝热量子磁通参数电路系列，旨在解决与SFQ逻辑电路的设计自动化和优化相关的四个关键问题，即：最小化SFQ电路的重定时到用于提高工作频率和/或时钟相位一致性的缓冲器的数量；带环路的顺序SFQ电路的路径平衡技术映射；利用SFQ逻辑族的独特功能和强大的数学优化工具进行时序驱动的全局布局；这一奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The critical dependence of the world economy on energy-efficient operations in computing are now almost universally recognized. To this end, advances in “beyond-CMOS” device technologies and corresponding logic families are now seen as a key step towards achieving the next major leap in high-performance computing. The challenges and opportunities described in this research provide directions for developing many aspects of a very promising “beyond-CMOS” technology, which can result in extremely high-performance, yet energy-efficient, computing systems, and thereby ensure sustainability of the information-technology ecosystem. SuperConductive Electronics (SCE) based on the Josephson junction (JJ) Single Flux Quantum (SFQ) logic cells have evolved into a within-reach “beyond-CMOS” technology, with switching speeds in the hundreds of GHz and energy dissipation of 10^-19 or less Joules per transition. The project will enhance business and societal opportunities by producing ultra-high performance and energy-efficient electronics for a wide range of computing fabrics, and in the process will also contribute to enhancing the technological capabilities of the US by providing education and research opportunities to undergraduate, graduate, and underrepresented students by including them in the planned research.This research aims to achieve major strides in the development of advanced circuits, architectures and design-automation technologies in support of large-scale superconductive SFQ digital electronics to meet the needs of future energy-efficient, high-performance exa-scale computing systems. Research on design automation will enable large-scale SCE systems integration. Targeting both DC-powered energy-efficient Rapid SFQ and AC-powered Adiabatic Quantum-Flux-Parametron circuit families, this research aims to solve four key problems associated with the design automation and optimization of SFQ logic circuits, namely: minimization of SFQ circuit retiming to the number of buffers for operating frequency improvement and/or clock-phase consistency; path-balancing technology mapping for sequential SFQ circuits with loops; timing-driven global placement using unique features of SFQ logic families and a powerful mathematical optimization tool; and circuit partitioning to enable effective current recycling.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.