CAREER: Computer-Aided Design of Mixed ASIC / Reconfigurable Fabrics of the Nanometer Era

职业：纳米时代混合 ASIC/可重构织物的计算机辅助设计

• 批准号: 0347891
• 负责人: Kia Bazargan
• 金额: $ 40万
• 依托单位: University of Minnesota-Twin Cities
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2004
• 资助国家: 美国
• 起止时间: 2004-01-15 至 2008-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0347891&HistoricalAwards=false
• 关键词: CAREER; Computer; Aided; Design; Mixed

PROPOSAL NO: 0347891INSTITUTION: U of Minnesota-Twin CitiesPRINCIPAL INVESTIGATOR: Bazargan, KiaTITLE: Computer-Aided Design of Mixed ASIC / Reconfigurable Fabrics of the Nanometer EraAbstract:Improvements in the chip manufacturing technology have brought about astonishing growth of electronic systems, resulting in multi-gigahertz clock speeds and billion-gate chips. However, explosive complexities, rising manufacturing costs, shrinking time-to-market windows, and deep submicron effects are threatening the continuation of the growth in the electronics technology. New system complexities result in unreliability (even failure) and unpredictability of system behavior. Employing FPGA-like (Field Programmable Gate Array) reconfigurable blocks in SoC promotes flexibility and drives non-recurring engineering (NRE) costs down.Embedded FPGA-like reconfigurable fabrics have emerged as part of todays SoC, and will inevitably be part of future designs because of the enormous advantages they provide. However, there are many challenging hurdles in way of employing reconfigurable fabrics within SoC. This proposal tackles a number of these challenges: 1) Statistical modeling and optimization at different levels of abstraction are proposed to take on the reliability and predictability concerns. 2) Architectural features for the reconfigurable fabrics are also investigated to reduce power and improve thermal conduction out of the fabric, while optimizing the flexibility, cost and performance. 3) CAD algorithms for mixed ASIC / reconfigurable fabric are proposed, and include hierarchical evaluation and estimation of uncertain designs, low power optimization and technology mapping.The proposed algorithms and methodologies would consider flexibility, reliability and productivity as first-class citizens to be optimized along with other design quality metrics such as area, cost, and performance. We will incorporate some of the results of this research in the VLSI courses at the University of Minnesota, as well as an advanced course on reconfigurable computing. Furthermore, a web page will be developed that would host all course material, reconfigurable benchmarks and FPGA tools from our group and other researchers.

PROPOSAL NO: 0347891INSTITUTION: U of Minnesota-Twin CitiesPRINCIPAL INVESTIGATOR: Bazargan, KiaTITLE: Computer-Aided Design of Mixed ASIC / Reconfigurable Fabrics of the Nanometer EraAbstract:Improvements in the chip manufacturing technology have brought about astonishing growth of electronic systems, resulting in multi-gigahertz clock speeds and billion-gate chips.然而，爆炸性的复杂性，制造成本上升，市场上的窗户的缩小以及深层的量子效应威胁到电子技术增长的延续。新的系统复杂性导致系统行为的不可靠性（甚至失败）和不可预测性。在SOC中采用类似FPGA的（现场可编程栅极阵列）可重构块可提高灵活性，并推动非经常性工程（NRE）的成本降低。Embedded类似FPGA的可重新配置织物已成为今天的SOC的一部分，并且无可避免地会成为未来设计的一部分，因为他们提供了强大的Admost Advantages。 但是，在SOC内采用可重构面料的方式有许多挑战性的障碍。该提案应对许多挑战：1）提议在不同级别的抽象级别上进行统计建模和优化，以应对可靠性和可预测性问题。 2）还研究了可重构织物的建筑特征，以降低功率并改善织物的热传导，同时优化柔韧性，成本和性能。 3）提出了混合ASIC / RENECHIGURABLAIGN的CAD算法，包括对不确定设计，低功率优化和技术映射的层次评估和估计。拟议的算法和方法论将考虑灵活性，可靠性，可靠性和生产力作为一流的公民，可以优化其他设计质量的质量指标，例如其他设计质量的领域，例如面积，成本，成本，成本，成本，成本，成本，成本，和成本，成本，和成本，和成本，成本，成本，成本，和成本。我们将在明尼苏达大学的VLSI课程中纳入一些研究结果，以及可重新配置的高级课程。此外，将开发一个网页，该页面将托管我们小组和其他研究人员的所有课程材料，可重新配置的基准和FPGA工具。