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PFI-TT: Harnessing the power of uncompressed number representation for modern computations

PFI-TT: Harnessing the power of uncompressed number representation for modern computations
PFI-TT:利用未压缩数字表示的力量进行现代计算
批准号:
2016390
负责人:
Kia Bazargan
金额:
$25.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2020
资助国家:
美国
项目状态:
已结题
起止时间:
2020-08-15 至 2024-12-31

项目摘要

项目成果

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中文摘要
翻译
这个创新伙伴关系-技术转化(PFI-TT)项目的更广泛的影响/商业潜力是利用“一元计算”来显著提高某些现代应用程序的性能。基于云的机器学习、高频交易、视频/音频/信号处理应用于安全摄像头、无人机(uav)和视频流都是此类应用的例子。提出的方法提高了应用速度,同时降低了硬件成本(芯片尺寸)和中等分辨率计算(8-12位二进制数字)的功耗。由于降低了电路的功耗,冷却成本也降低了。速度和成本是重要的计算机处理指标,对工业成本有实际影响。使用“即插即用”方案,许多现代计算机应用程序可以很容易地从这些改进中获益,在这种方案中,传统的功能实现被它们的一元对应物取代,而不改变系统的其余部分。基于云的机器学习、高频交易、视频/音频/信号处理应用于安全摄像头、无人机(uav)和视频流都是此类应用的例子。提议的项目开发利用一元计算的设计方法,一元计算是数字计算中的一种新的、非常规的范例。使用“未压缩”的数据表示(一元)代替传统的数字二进制表示,使计算非常高效。有限的硬件资源可以执行复杂的计算。计算机代码的传统方法通常需要许多乘法和加法运算,通过多项式展开来计算cosh(x), tanh(x)和y=x0.45等函数。一元计算能够廉价而直接地执行这些计算,而不需要昂贵的乘法。这些功能广泛应用于信号处理(图像/视频/音频/雷达)。此外,一元计算可以显著降低常系数乘法的计算复杂度,这在机器学习(ML)应用中得到了广泛的应用。实验证明,降低计算复杂度可以提高计算速度,减少硬件面积(执行计算的芯片尺寸和成本),降低功耗。该项目的目标是开发一个设计工具集,用于自动生成一元计算的电路。此外,还将开发一个高度优化的硬件知识产权(IP)模块库。本研究的目标包括开发必要的工具集和设计流程,以帮助设计师将所提出的技术集成到他们的电子设计中。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
The broader impact/commercial potential of this Partnerships for Innovation - Technology Translation (PFI-TT) project is to harness “Unary computing” to significantly improve the performance of select modern applications. Cloud-based machine learning, high-frequency trading, and video / audio / signal processing used in security cameras, unmanned aerial vehicles (UAVs), and video streaming are examples of such applications. The proposed methodology improves application speed while lowering hardware cost (chip size) and power for moderate resolution computations (8-12 binary digits). Cooling costs are also reduced as a direct result of reducing the power consumption of the circuits. Speed and cost are important computer processing metrics that have real impacts on industry costs. Many modern computer applications can readily benefit from these improvements using a “plug-and-play” scheme in which traditional implementations of functions are replaced with their unary counterparts without changing the rest of the system. Cloud-based machine learning, high-frequency trading, and video / audio / signal processing used in security cameras, unmanned aerial vehicles (UAVs), and video streaming are examples of such applications. The proposed project develops design methodologies harnessing unary computing, which is a new, unconventional paradigm in digital computing. An “uncompressed” data representation (unary) is used instead of the traditional binary representation of numbers to make computations very efficient. Limited hardware resources can perform complex calculations. Conventional methods of computer code often require many multiplications and addition operations to calculate functions such as cosh(x), tanh(x) and y=x0.45 through polynomial expansions. Unary computing is able to perform these calculations cheaply and directly without costly multiplications. These functions are widely used in applications in signal processing (image / video / audio / radar). Furthermore, unary computing can be used in significantly reducing the computation complexity of constant coefficient multiplication, which is widely used in machine learning (ML) applications. As validated by experiments, reducing computation complexity increases computation speed, reduces hardware area (size and cost of the chips to perform computations), and reduces power. The goal of this project is to develop a design toolset for automatically generating circuits for unary computing. Furthermore, a library of highly optimized hardware intellectual property (IP) blocks will be developed. The objectives of this research include developing the necessary toolset and design flows to help designers integrate the proposed technology in their electronic designs.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(3)
专著(0)
科研奖励(0)
会议论文
Optimizing Hybrid Binary-Unary Hardware Accelerators Using Self-Similarity Measures
使用自相似性测量优化混合二元-一元硬件加速器
DOI: 10.1109/fccm57271.2023.00020
发表时间: 2023
期刊: 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM
影响因子: --
作者: [Khataei, Alireza, Singh, Gaurav, Bazargan, Kia]
通讯作者: Bazargan, Kia
Constant Coefficient Multipliers Using Self-Similarity-Based Hybrid Binary-Unary Computing
使用基于自相似性的混合二元-一元计算的常数系数乘法器
DOI: 10.1109/iccad57390.2023.10323844
发表时间: 2023
期刊: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD
影响因子: --
作者: [Khataei, Alireza, Bazargan, Kia]
通讯作者: Bazargan, Kia
Approximate Hybrid Binary-Unary Computing with Applications in BERT Language Model and Image Processing
近似混合二元-一元计算及其在 BERT 语言模型和图像处理中的应用
DOI: 10.1145/3543622.3573181
发表时间: 2023
期刊: FPGA '23: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
影响因子: --
作者: [Khataei, Alireza, Singh, Gaurav, Bazargan, Kia]
通讯作者: Bazargan, Kia
I-Corps: Harnessing Unary Computing for Modern Applications
  • 批准号:
    2031325
  • 项目类别:
    Standard Grant
  • 资助金额:
    $5.0万
  • 财政年份:
    2020
  • 负责人:
    Kia Bazargan
  • 依托单位:
EAGER: A New Methodology for Studying Dynamical Systems Using Probabilistic Digital Logic
  • 批准号:
    1450798
  • 项目类别:
    Standard Grant
  • 资助金额:
    $7.78万
  • 财政年份:
    2015
  • 负责人:
    Kia Bazargan
  • 依托单位:
SHF: Medium: Back to the Future with Printed, Flexible Electronics Design in a Post-CMOS Era when Transistor Counts Matter Again
  • 批准号:
    1408123
  • 项目类别:
    Standard Grant
  • 资助金额:
    $80.0万
  • 财政年份:
    2014
  • 负责人:
    Kia Bazargan
  • 依托单位:
CAREER: Computer-Aided Design of Mixed ASIC / Reconfigurable Fabrics of the Nanometer Era
  • 批准号:
    0347891
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $40.0万
  • 财政年份:
    2004
  • 负责人:
    Kia Bazargan
  • 依托单位:
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  • 项目类别:
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  • 资助金额:
    50.00万元
  • 批准年份:
    2025
  • 负责人:
    刘金隆
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叶绿体蛋白 TT3.2 调控水稻耐热性的分子机制研究
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  • 项目类别:
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    2024
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  • 批准号:
    52403407
  • 项目类别:
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  • 资助金额:
    30.00万元
  • 批准年份:
    2024
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