SBIR Phase II: Ge-Free Strained Silicon Via dTCE Bonding (Differential Thermal Coefficient of Expansion Bonding)

SBIR 第二阶段：通过 dTCE 键合（膨胀键合的差热系数）获得无 Ge 应变硅

• 批准号: 0421948
• 负责人: Sumant Sood
• 金额: --
• 依托单位: BELFORD RESEARCH, INC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2004
• 资助国家: 美国
• 起止时间: 2004-07-15 至 2006-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0421948&HistoricalAwards=false
• 关键词: SBIR; Phase; II; Ge; Free

This Small Business Innovative Research Phase II project will develop a process that integrates wafer bonding technology with a novel straining process to create a new ultra fast silicon substrate: Strained-Silicon-On-Insulator (SSOI). This substrate can undergo normal IC fabrication and resulting circuits will be 30% faster at half the power required for comparative non-strained- SSOI architectures. The process is a direct approach and entirely surpasses the nearest competition as there is no germanium in any part of the processing. As a result the strained silicon is free from the high concentration of treading dislocations (105 cm-2) always present when strained-silicon is grown on "strain-relaxed" silicon germanium virtual substrates. The silicon strained by the proposed method is maintained within its mechanically elastic region and thus is free from structural imperfections. The proposed method engages wafer bonding procedures already in place within the industry and modifies those processes to give a combined result of wafer bonding and SOI straining within a single step. The direct approach and single processmakes the technique very inexpensive. The discipline evoked is fundamental surface sciencewhich involves investigation of both physical properties such as surface energies along withchemical aspects such as maintaining surface hydration and active surface species required forwafer bonding.Commercially, the substrates available via this effort will make possible ultra fast silicon electronics. The proposed process also allows for non-intrusive radiation-hardening, giving initial commercial outlet in the military sector. Further markets includemainstream silicon-based electronics; effectively new host materials with speeds morecharacteristic of materials such as gallium arsenide and most salient, very low power electronics.

这个小型企业创新研究第二阶段项目将开发一种工艺，将晶圆键合技术与新型应变工艺相结合，以创建一种新的超快硅衬底：绝缘体上应变硅（SSOI）。该衬底可以进行正常的IC制造，并且所产生的电路将在比较非应变SSOI架构所需的一半功率下快30%。该工艺是一种直接的方法，完全超越了最接近的竞争对手，因为在加工的任何部分都没有锗。因此，应变硅是免费的高浓度的踩踏位错（105 cm-2）总是存在时，应变硅生长在“应变弛豫”硅锗虚拟衬底。所提出的方法应变的硅保持在其机械弹性区域内，因此没有结构缺陷。所提出的方法从事晶圆键合程序已经在工业中，并修改这些过程中给出一个综合的结果，晶圆键合和SOI应变在一个单一的步骤。直接的方法和单一的过程使得该技术非常便宜。这门学科被称为基础表面科学，它涉及到物理性质的研究，如表面能沿着化学方面的研究，如保持表面水合作用和晶片键合所需的活性表面物种。拟议的工艺还允许进行非侵入性的辐射硬化，从而在军事部门提供初步的商业出口。进一步的市场包括主流的硅基电子产品;有效的新的主机材料，速度更快的材料，如砷化镓和最突出的，非常低的功率电子产品。