SGER: QuBIC: Hardware System Architecture for Quantum Information Processor in Quantum Communication Networks

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Serious system-level study on the realization of quantum information processor is in its infancy, and faces challenges due to its vastly interdisciplinary nature. A successful hardware system architecture for trapped ion systems will provide a concrete path to realizing a robust quantum information processor. This proposal presents research activity on the topic of hardware system engineering for a trapped ion quantum information processor, with a long- term goal of constructing a quantum communication network.Intellectual MeritTrapped ion systems provide a promising physical substrate to realize qubits. Existing integrated circuit (IC) and system-on-a-chip (SOC) technologies, and recent progress in micro-opto-electro-mechanical systems (MOEMS) technology could be utilized to realize the complex classical system needed to control these qubits. Development of functionally integrated MOEMS technology optimized for this purpose is proposed as the main experimental activity of the proposal.Broader ImpactThe eventual realization of the quantum processor requires components from various technology areas, and the current proposed research activity can only be effectively pursued in a collaborative and interdisciplinary team. Cultivating collaborative team will be an essential element of the research activity. The research activities proposed will offer the participating students and postdoctoral researchers many opportunities to gain broad range of experiences. All participating students will enjoy collaboration with network of researchers from leading research organizations.