SGER: Analysis of Fault-Tolerant Nanoscale Designs

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Proposal ID: CCF-0542644 PI: Marculescu, Diana Institution: Carnegie-Mellon University Title: SGER: Analysis of Fault-Tolerant Nanoscale Designs ABSTRACT:Nano-scale computing for either CMOS or non-CMOS technology is widely agreed to be characterized by non-deterministic and unreliable behavior. While fault-tolerant computing is a mature area of research, automatically designing reliable systems out of unreliable components has proven to be a challenging task. Since a practical solution to synthesizing in an automated manner, nano-scale designs that are inherently fault-tolerant has yet to be found, theoretical bounds may offer a good insight into the achievable limits of error-resilience and required minimum redundancy (or extra logic) needed. This research is intended to fill this gap and is poised to have broader impact on possible novel modeling, design and system architecture concepts involved in silicon nano-electronics and beyond (SNB). One can envision applicability of the proposed modeling techniques to atomic scale DNA-based switches. The combination of the properties of nucleic acid with those of the metal ions can lead to chemically or physically activated switches that can be combined to achieve certain functionalities or to perform relatively complex Boolean functions. Since such switches are not perfect and redundancy use is mandatory for achieving reliable global switching behavior, determining a priori theoretical bounds for the necessary redundancy is of chief practical interest. Potential applications of these structures are in molecular electronics that might be used in human body-implanted sensors and actuators or non-invasive drug delivery systems.