课题基金 / 基金详情

CSR---SMA: Variability-Aware System Level Performance and Power Analysis

CSR---SMA: Variability-Aware System Level Performance and Power Analysis
CSR---SMA:可变性感知系统级性能和功耗分析
批准号:
0720653
负责人:
Diana Marculescu
金额:
$29.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-09-01 至 2011-08-31

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中文摘要
翻译
当前的高级设计方法和工具假设一个经典的静态定时行为,不包括设计可变性对性能或能量的影响。为了支持完整的概率设计流程,需要对可变性效应进行高级建模,以确定最可能满足初始设计约束的设计选择。该项目能够对整个系统性能和功耗的设计可变性进行高层次的分析。对于映射到以全局同步或异步片上通信为特征的平台上的延迟和吞吐量受限的应用程序,解决了性能和功耗分析问题。该研究提供了一个全面的框架,包括(i)概率延迟,速率和泄漏分析的变化;(ii)设计探索能力,以便在设计过程的早期确定更有可能满足规定性能或泄漏功率限制的设计选择。该项目的一个组成部分是它对卡内基梅隆大学教育活动的影响,以及通过支持前沿应用程序开发对整体社会的影响。如果没有培养下一代系统设计师和计算机架构师的坚实基础,就不可能实现大规模集成系统。所提出的可变性建模框架(将免费发布)可用于下一代片上系统的设计,从而使应用程序具有广泛的社会影响。更准确地说,无缝集成同质或异构内核并具有可预测性能和功率预算的复杂系统最有可能在消费者市场的大部分市场中找到它们的应用。
英文摘要
Current high-level design methodologies and tools assume a classic static timing behavior and do not include effects of design variability on performance or energy. In support of a complete probabilistic design flow, high-level modeling of variability effects is needed for determining design choices that are most likely to meet initial design constraints. This project enables high-level analysis of design variability on overall system performance and power consumption. The problem of performance and power analysis is addressed for both latency- and throughput-constrained applications mapped onto platforms characterized by either globally synchronous or asynchronous on-chip communication. The research provides a comprehensive framework that includes (i) probabilistic latency, rate, and leakage analysis in the presence of variations; and (ii) design exploration capabilities for determining early in the design process the design choices more likely to meet prescribed performance or leakage power limits. An integral component of the project is its impact on educational activities at Carnegie Mellon University, as well as its overall societal impact via enabling frontier application development. Without a strong foundation for training next generation''s system designers and computer architects, the achievement of aggressively scaled integrated system will not be possible. The proposed variability modeling framework (which will be distributed freely) can be used for the design of next generation Systems-on-Chip, thereby enabling applications having a broad societal impact. More precisely, complex systems that seamlessly integrate homogeneous or heterogeneous cores and have predictable performance and power budgets will most likely find their applications in large segments of the consumer market.
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