CSR---EHS: Ultra low cost system-level defect protection

CSR---EHS：超低成本系统级缺陷保护

• 批准号: 0615005
• 负责人: Valeria Bertacco
• 金额: $ 36万
• 依托单位: Regents of the University of Michigan - Ann Arbor
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-07-01 至 2011-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0615005&HistoricalAwards=false
• 关键词: CSR; EHS; Ultra; low; cost

0Current technology trends of silicon transistor devices are quickly reaching a stage where the atomic scale of such devices will heavily affect their reliability. Leading technology experts have started warning computer designers that device reliability will begin to wane heavily in the next five to ten years. This will lead to skyrocketing manufacturing costs and severely shortened product lifetimes. To address such an important and imminent problem, this research focuses on the development of effective, low-cost mechanisms to protect a computing system from silicon defects, both those occurring during manufacturing and those that occur while the device is in operation in the field. The objective is to provide solutions that detect the occurrence of a failure, correct any affected computation, and repair the hardware silicon fabric, all with minimal cost and performance impact. To assess the upcoming exposure to silicon defects, this project includes the development of a high-level silicon reliability modeling infrastructure, based on high performance simulation software and high-level modeling of the failure mechanisms. Once this exposure is analytically evaluated, the core of the research investigates solutions which attack the problem by exploring a novel combination of cost-efficient online defect testing and novel memory management. These two powerful technologies combined have the potential to lead to solutions that provide at least as much reliability as traditional approaches, but at significantly lower cost. Initial studies suggest that such solutions are much less expensive than previously proposed defect-tolerance techniques, due to the time and space efficiency of the underlying mechanisms.

硅晶体管器件的当前技术趋势正在迅速达到这样的阶段，其中这种器件的原子尺度将严重影响它们的可靠性。领先的技术专家已经开始警告计算机设计者，设备的可靠性将在未来五到十年内开始严重下降。这将导致制造成本飙升，产品寿命严重缩短。为了解决这样一个重要的和迫在眉睫的问题，本研究的重点是开发有效的，低成本的机制，以保护计算系统的硅缺陷，无论是那些发生在制造过程中，而设备在现场操作时发生。目标是提供检测故障发生、纠正任何受影响的计算并修复硬件硅结构的解决方案，所有这些都具有最小的成本和性能影响。为了评估即将出现的硅缺陷，该项目包括基于高性能仿真软件和故障机制高级建模的高级硅可靠性建模基础设施的开发。一旦这种暴露进行了分析评估，研究的核心是通过探索具有成本效益的在线缺陷测试和新型内存管理的新组合来研究解决问题的解决方案。这两种强大的技术相结合，有可能导致解决方案，提供至少与传统方法一样多的可靠性，但成本显着降低。初步研究表明，这种解决方案比以前提出的缺陷容忍技术便宜得多，这是由于底层机制的时间和空间效率。