CSR---EHS: Ultra low cost system-level defect protection

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0Current technology trends of silicon transistor devices are quickly reaching a stage where the atomic scale of such devices will heavily affect their reliability. Leading technology experts have started warning computer designers that device reliability will begin to wane heavily in the next five to ten years. This will lead to skyrocketing manufacturing costs and severely shortened product lifetimes. To address such an important and imminent problem, this research focuses on the development of effective, low-cost mechanisms to protect a computing system from silicon defects, both those occurring during manufacturing and those that occur while the device is in operation in the field. The objective is to provide solutions that detect the occurrence of a failure, correct any affected computation, and repair the hardware silicon fabric, all with minimal cost and performance impact. To assess the upcoming exposure to silicon defects, this project includes the development of a high-level silicon reliability modeling infrastructure, based on high performance simulation software and high-level modeling of the failure mechanisms. Once this exposure is analytically evaluated, the core of the research investigates solutions which attack the problem by exploring a novel combination of cost-efficient online defect testing and novel memory management. These two powerful technologies combined have the potential to lead to solutions that provide at least as much reliability as traditional approaches, but at significantly lower cost. Initial studies suggest that such solutions are much less expensive than previously proposed defect-tolerance techniques, due to the time and space efficiency of the underlying mechanisms.