Design Methods and Optimization Techniques for Multiprocessor Systems-on-Chip (MPSoCs)

项目ID：0 70240项目标题：多处理器片上系统(MPSoCs)的设计方法和优化技术PI名称：Radu MarculescuInstitution：卡内基梅隆大学ABSTRACT以纳米级设计的电子集成系统很快将在单个芯片上包含10亿个晶体管。这使得集成数百个同时运行多个应用程序的IP核成为可能。然而，随着CMOS技术接近纳米级领域，不断增加的功耗、通信缺乏可扩展性以及如此小尺寸的设计的可靠性使得使用现有的设计方法和软件工具来构建负担得起的多处理器片上系统(MPSoC)是不现实的。因此，本项目探索了基于通信的设计作为设计未来MPSoC的新范式。更准确地说，我们提出了针对特定应用的片上网络(NoCs)的自动化通信体系结构综合，其中许多不同的IP核通过分组交换进行通信，类似于在互联网上最常用的技术。我们NOC方法背后的主要承诺是实现真正可扩展和高能效的片上通信解决方案，同时保持可管理的设计努力，因为摩尔定律每年都在增加芯片的复杂性。

Project ID: 0 702420Project Title: Design Methods and Optimization Techniques for Multiprocessor Systems-on-Chip (MPSoCs)PI Name: Radu MarculescuInstitution: Carnegie Mellon UniversityABSTRACTElectronic integrated systems designed at nanoscale will soon contain a billion transistors on a single chip. This makes it possible to integrate hundreds of IP cores running multiple applications simultaneously. However, as CMOS technology approaches the nanoscale domain, increased power consumption, lack of scalability in communication, and reliability of the design at such small sizes make it impractical to build affordable multiprocessor systems-on-chip (MPSoCs) using the existing design methodologies and software tools. Consequently, this project explores the communication-based design as a new paradigm to design the future MPSoCs. More precisely, we propose automated communication architecture synthesis for application-specific Networks-on-Chip (NoCs) where many heterogeneous IP cores communicate via packet switching, similarly to techniques used most commonly over the Internet. The main promise behind our NoC approach is to achieve a truly scalable and energy-efficient solution for on-chip communication, while maintaining manageable design efforts as Moore's law continues to increase chip complexity year after year.