SHF: Small: The Chip Is the Network: Rethinking the Theoretical Foundations of Multicore Architecture Design

SHF：小：芯片就是网络：重新思考多核架构设计的理论基础

• 批准号: 0916752
• 负责人: Radu Marculescu
• 金额: $ 45万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-08-01 至 2014-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0916752&HistoricalAwards=false
• 关键词: SHF; Small; Chip; Network; Rethinking

Project ID: 0916752 Title: The Chip Is the Network: Rethinking the Theoretical Foundations of Multicore Architecture DesignPI Name: Radu MarculescuInstitution: Carnegie-Mellon UniversityABSTRACTRecent advances in CMOS technology allow the integration of tens or hundreds of individually programmable processing elements, together with large amounts of dedicated memory, on the same system-on-chip (SoC). In such multiprocessor systems, individual processing nodes can communicate and coordinate via networks-on-chip (NoCs). Therefore, a major challenge is to determine the mathematical techniques for designing and optimizing such on-chip networks in a rigorous manner. Traditional queuing and Markov chain approaches to buffer allocation are helpful to a certain extent, but capturing the traffic variability represents a major problem. Starting from these overarching ideas, this project introduces a new statistical-physics approach for performance analysis in multiprocessor SoCs. More precisely, we develop a completely new mathematical description of network traffic using an analogy between a Bose gas and the information flow in the communication network. This new modeling paradigm where networks are seen as gases can be further used to develop efficient on-chip buffer assignment algorithms. The new design methodology enables the development of more efficient multiprocessor SoCs which have a dramatic impact on society via applications ranging from entertainment to gaming to security and to bio- and gene engineering. More broadly, the results of this project impact significantly other research communities by improving the level of understanding of networking concepts needed to design and control complex systems.

项目编号：0916752题目：芯片即网络：重新思考多核架构设计的理论基础研究员姓名：Radu Marculescu机构：卡内基-梅隆大学摘要CMOS技术的最新进展允许在同一片上系统（SoC）上集成数十或数百个单独可编程的处理元件以及大量专用存储器。在这样的多处理器系统中，各个处理节点可以经由片上网络（NoC）进行通信和协调。因此，一个主要的挑战是以严格的方式确定用于设计和优化这种片上网络的数学技术。传统的排队和马尔可夫链的方法来缓冲区分配是有帮助的，在一定程度上，但捕捉流量的变化是一个主要的问题。从这些总体思路出发，本项目介绍了一种新的物理方法，在多处理器SoC的性能分析。更准确地说，我们开发了一个全新的数学描述网络流量使用玻色气体和通信网络中的信息流之间的类比。这种将网络视为气体的新建模范式可以进一步用于开发高效的片上缓冲区分配算法。 新的设计方法使开发更高效的多处理器SoC成为可能，这些SoC通过从娱乐到游戏到安全以及生物和基因工程等应用对社会产生巨大影响。更广泛地说，该项目的结果通过提高对设计和控制复杂系统所需的网络概念的理解水平，对其他研究团体产生了重大影响。