Tools for Exploring Low-power, High-performance Reconfigurable Computing Architectures

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Proposal ID: 0702621PI Institution: University of Washington, SeattlePI name: Cark EbelingTitle: Tools for Exploring Low-power, High-performance Reconfigurable Computing ArchitecturesAbstract:Creating high-performance, low-power systems for embedded communications, media and signal-processing applications in future nanoscale technologies will require new parallel computing architectures that can be reconfigured on-the-fly to match the structure of the application. Computing infrastructures based on these coarse-grained reconfigurable platforms will be better able to meet the future performance and power demands of embedded applications than traditional processor-based architectures.The potential design space of these large-scale coarse-grained reconfigurable computing architectures is enormous, and efficient, architecture-independent tools will be needed to quickly explore and evaluate the different points in this space for different applications and application domains. This research project will develop architecture-independent tools that map the intermediate representations of algorithms produced by compilers to coarse-grained reconfigurable architectures comprising a wide range of architectural features. These tools will rely on integrating scheduling, placement and routing algorithms to perform this mapping. They will enable the fast exploration of the overall space of large-scale coarse-grained reconfigurable architectures, as well as the impact of specific architectural features and structures.