NER: Modeling and Design of Nanotube-Based On-Chip Interconnect Solutions for Future VLSI Applications

NER：面向未来 VLSI 应用的基于纳米管的片上互连解决方案的建模和设计

• 批准号: 0709334
• 负责人: Yehia Massoud
• 金额: $ 12.96万
• 依托单位: William Marsh Rice University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-06-15 至 2009-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0709334&HistoricalAwards=false
• 关键词: NER; Modeling; Design; Nanotube; Based

NER: Modeling and Design of Nanotube-Based On-Chip Interconnect Solutions for Future VLSI Applications (ECCS-0709334)Objective:In future nanoscale integrated circuits, process technology scaling coupled with increasing operating frequencies will exacerbate the resistivity, electromigration, and delay problems that already plague interconnect in today's designs. As CMOS technology is pushed to its basic physical limits, alternate technologies are required for on-chip communication. In this project, we will explore carbon nanotube-based interconnect solutions for future VLSI applications.Intellectual Merit: Metallic carbon nanotubes are a promising replacement for on-chip copper interconnect due to their large conductivity and current carrying capabilities. We will investigate and develop equivalent circuit models to facilitate the development of nanotube-based interconnect solutions. Using the proposed models, we will examine the performance and reliability of nanotube interconnect structures in future process technologies. Nanotube-based interconnect solutions have the potential to revolutionize next generation integrated circuits for a large array of VLSI applications. Broader Impacts:In addition, the educational and outreach programs associated with the proposed research, which target minority, undergraduate, and graduate students, will be instrumental in promoting the scientific principles related to carbon nanotubes and nanoscale integrated circuits.

目的：在未来的纳米级集成电路中，工艺技术的缩放加上工作频率的增加将加剧电阻率、电迁移和延迟问题，这些问题已经困扰着当今的互连设计。随着CMOS技术被推向其基本的物理极限，片上通信需要替代技术。在这个项目中，我们将探索基于碳纳米管的互连解决方案，用于未来的VLSI应用。知识优势：由于金属碳纳米管具有较大的导电性和载流能力，因此有望取代片上铜互连。我们将研究和开发等效电路模型，以促进基于纳米管的互连解决方案的发展。利用所提出的模型，我们将在未来的工艺技术中研究纳米管互连结构的性能和可靠性。基于纳米管的互连解决方案有可能彻底改变下一代集成电路，用于大量VLSI应用。更广泛的影响：此外，与提议的研究相关的教育和推广计划，针对少数民族，本科生和研究生，将有助于促进与碳纳米管和纳米级集成电路相关的科学原理。