SBIR Phase I: Ultra-Low k Interlayer Dielectrics for 22 nm Technology Node and Beyond

SBIR 第一阶段：适用于 22 nm 及以上技术节点的超低 k 层间电介质

• 批准号: 0711335
• 负责人: Petar Dvornic
• 金额: --
• 依托单位: DENDRITECH, INC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-07-01 至 2008-03-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0711335&HistoricalAwards=false
• 关键词: SBIR; Phase; Ultra; Low; Interlayer

This Small Business Innovation Research Phase I project aims to develop a new technology for manufacturing ultra-low dielectric constant materials (e 2.0) for leading-edge logic devices for the 22 nm technology node and beyond. It is widely recognized that materials presently used in the 90 and 65 nm technology nodes will not remain endlessly effective with further miniaturization of integrated circuits either because they do not have sufficiently low e values, or because their morphological features will not provide acceptable mechanical properties for integration. This project will investigate a new approach to interlayer dielectrics based on the bottom-up synthesis of honeycomb-like nano-structured films in which porogen component is pre-built into the nano-sized cells and can be decomposed in a strictly controlled manner. This provides geometrically precisely organized closed pores with diameters selected at will from the range of 1-5 nm with precision of +/- 1 nm and separated by the 1-3 nm thin organo-inorganic walls. The proposed research program will have three major parts: (i)bottom-up synthesis of the nano-scaled precursor films, (ii) controlled preparation of nano-porous dielectrics, and (iii) characterization of the obtained products. While the immediate focus of this Phase I program will be on the interlayer dielectrics for the 22 nm node, it will also have a major impact on efforts beyond this stage and to the ultimate limits of silicon-based computers. This program will also significantly contribute to expanding our overall knowledge and understanding of nano-structured materials and nanotechnology in general. The Phase I results will provide proof-of-concept data that will be used to design a program for optimization and further improvement of this process and materials.

该小型企业创新研究第一阶段项目旨在开发一种新技术，用于制造22 nm技术节点及以上的领先逻辑器件的超低介电常数材料（e 2.0）。人们普遍认识到，目前用于90和65 nm技术节点的材料将不会随着集成电路的进一步小型化而保持无限有效，因为它们不具有足够低的e值，或者因为它们的形态特征将不能提供可接受的集成机械性能。 本项目将研究一种基于自下而上合成蜂窝状纳米结构膜的层间介孔化新方法，其中致孔剂组分预先构建在纳米尺寸的细胞中，并且可以以严格控制的方式分解。这提供了几何上精确组织的封闭孔，其直径以+/-1nm的精度从1-5 nm的范围随意选择，并由1-3 nm薄的有机-无机壁隔开。拟议的研究计划将有三个主要部分：（i）自下而上的纳米级前体膜的合成，（ii）控制制备纳米多孔膜，和（iii）所获得的产品的表征。虽然第一阶段计划的直接重点将是22纳米节点的层间互连，但它也将对这一阶段之后的工作以及硅基计算机的最终极限产生重大影响。 该计划也将大大有助于扩大我们的整体知识和纳米结构材料和纳米技术的一般理解。第一阶段的结果将提供概念验证数据，这些数据将用于设计优化和进一步改进该工艺和材料的程序。