CSR---SMA: A CAD framework to support the effective application of redundancy at the switch/architectural level for future technologies having high defect rates and variations

CSR---SMA：一个CAD框架，支持在交换机/架构级别有效应用冗余，以应对具有高缺陷率和变化的未来技术

• 批准号: 0720909
• 负责人: Melvin Breuer
• 金额: $ 35万
• 依托单位: University of Southern California
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-08-01 至 2011-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0720909&HistoricalAwards=false
• 关键词: CSR; SMA; CAD; framework; support

Computer-aided-design systems for digital circuits interfaces with computing technologies and fabrication processes that exhibit high levels of variations, defect densities and noise susceptibility. A direct extrapolation and ad-hoc application of existing defect-tolerance (DT) and fault-tolerance (FT) techniques erodes much of the benefits of new technologies. The objective of this research is to develop a systematic framework for design and test of digital systems that optimizes a specified combination of cost, performance and power for nanometer technologies.A framework for efficient application of existing and new DT and FT techniques, including the use of spares, task rescheduling, coding and DFM rules is being developed. This framework works in conjunction with existing design flows and includes components spanning the levels of technology (variations/defects), layout, circuit, logic, architecture and system. Key innovations are embodied in new techniques for identifying efficient ways of assigning spares, reconfiguring around faulty modules, and modifying selected parts of a module to improve yield. To obtain optimality, a design explorer is being developed to efficiently search the space of alternative designs. This research will provide the first framework for design of digital systems for the remaining years of CMOS scaling and beyond. We will train graduate and undergraduate students in this methodology of the future and share our results with academic and industrial colleagues. This research will provide immense benefits to society by being a key enabler of an era of inexpensive and powerful digital devices with significant educational, health and security functions.

数字电路的计算机辅助设计系统与计算技术和制造工艺相结合，表现出高水平的变化、缺陷密度和噪声敏感性。对现有的容错（DT）和容错（FT）技术的直接外推和特别应用削弱了新技术的许多好处。本研究的目的是为设计和测试数字系统开发一个系统框架，以优化纳米技术的成本、性能和功率的特定组合。一个有效应用现有和新的DT和FT技术的框架，包括使用备件、任务重新调度、编码和DFM规则。该框架与现有的设计流程一起工作，并包括跨越技术（变化/缺陷）、布局、电路、逻辑、架构和系统级别的组件。关键的创新体现在识别有效分配备件的方法，围绕故障模块进行重新配置以及修改模块的选定部件以提高成品率的新技术上。为了获得最优性，设计探索者正在被开发，以有效地搜索备选设计的空间。这项研究将提供第一个框架的数字系统的设计，为CMOS的规模和未来几年。我们将在未来用这种方法培训研究生和本科生，并与学术界和工业界的同事分享我们的成果。这项研究将通过成为具有重要教育、健康和安全功能的廉价而强大的数字设备时代的关键推动者，为社会带来巨大的利益。