CAREER: Architectural Support for Automated Software Debugging

考虑到它们日益增加的复杂性，现代软件系统受到软件缺陷（通常称为bug）的困扰。在观察到程序失败后，软件开发人员通常需要花费大量的精力来定位缺陷。由于当时片上资源有限，传统的对调试的体系结构支持仅限于一组基本函数，如断点和观察点。随着半导体技术的进步，资源限制不再是一个问题，并且可以实现更强大的体系结构支持，以简化软件调试。在本研究中，开发了一种新的软硬件集成方法来自动定位软件缺陷，其目的是开发一种能够自动定位顺序或并行程序中的代码并潜在地生成缺陷修复的计算机。以前关于调试的体系结构支持的工作主要集中在调试活动的一个方面，包括忠实地再现程序失败或检测潜在的错误。相比之下，本研究引入了新的架构支持：bug检测，报告潜在的bug； bug隔离，根据潜在的bug与程序失败之间的因果关系找到相关的bug； bug验证，生成对被隔离的bug的快速修复，从而形成一个完整的自动化调试过程。顺序和并行程序中的错误是本研究的目标。对于并行程序，研究了事务性内存编程模型下的线程交互，并开发了新的并发错误自动调试方案。该研究还包括新架构支持的原型，以评估其在实际应用中的有效性。

Given their ever increasing complexity, modern software systems are plagued with software defects, commonly known as bugs. It usually takes significant amount of efforts for software developers to locate the defects after a program failure is observed. Due to the limited on-chip resource at the time, traditional architectural support for debugging was limited to a basic set of primitive functions like breakpoints and watchpoints. With the advances in semiconductor technology, the resource constraint is less of a concern and much more powerful architectural support becomes possible to be implemented to ease software debugging. In this research, novel software-hardware integrated approaches are developed to automatically pinpoint software defects and the aim is to develop a computer that can automatically pinpoint the faculty code in either sequential or parallel programs and potentially generate a fix to the defect.Previous work on architectural support for debugging mainly focused on one aspect of debugging activities including faithfully reproducing program failures or detecting potential bugs. In comparison, this research introduces novel architectural support for: bug detection to report potential bugs, bug isolation to find the relevant bugs based on cause-effect relationship between the potential bugs and the program failure, and bug validation to generate quick fixes to the isolated bugs, thereby forming a complete process of automated debugging. Bugs in both sequential and parallel programs are the target in this research. For parallel programs, the research investigates thread interaction under the transactional memory programming model and develops novel automated debugging schemes for concurrency bugs. The research also includes the prototype of the novel architectural supports to evaluate their effectiveness with real-world applications.