CAREER: Architectural Support for Automated Software Debugging

由于其不断增加的复杂性，现代软件系统受到软件缺陷的困扰，通常称为bug。软件开发人员在观察到程序失败后通常需要花费大量的努力来定位缺陷。由于当时片上资源有限，传统的架构对调试的支持仅限于一组基本的原始函数，如断点和观察点。随着半导体技术的进步，资源约束不再是一个问题，更强大的架构支持变得可能被实现，以减轻软件调试。在这项研究中，新的软硬件集成的方法，开发自动查明软件缺陷，其目的是开发一台计算机，可以自动查明教师的代码，无论是顺序或并行程序，并可能产生一个修复default.Previous工作的架构支持调试主要集中在一个方面的调试活动，包括忠实地再现程序故障或检测潜在的错误。相比之下，本研究引入了新的架构支持：错误检测报告潜在的错误，错误隔离，发现相关的错误之间的因果关系的基础上潜在的错误和程序失败，和错误验证，以产生快速修复隔离的错误，从而形成一个完整的自动化调试过程。本文的研究对象是串行程序和并行程序中的错误。对于并行程序，研究线程交互下的事务存储器编程模型，并开发新的并发错误的自动调试计划。该研究还包括新的架构支持的原型，以评估其有效性与现实世界的应用。

Given their ever increasing complexity, modern software systems are plagued with software defects, commonly known as bugs. It usually takes significant amount of efforts for software developers to locate the defects after a program failure is observed. Due to the limited on-chip resource at the time, traditional architectural support for debugging was limited to a basic set of primitive functions like breakpoints and watchpoints. With the advances in semiconductor technology, the resource constraint is less of a concern and much more powerful architectural support becomes possible to be implemented to ease software debugging. In this research, novel software-hardware integrated approaches are developed to automatically pinpoint software defects and the aim is to develop a computer that can automatically pinpoint the faculty code in either sequential or parallel programs and potentially generate a fix to the defect.Previous work on architectural support for debugging mainly focused on one aspect of debugging activities including faithfully reproducing program failures or detecting potential bugs. In comparison, this research introduces novel architectural support for: bug detection to report potential bugs, bug isolation to find the relevant bugs based on cause-effect relationship between the potential bugs and the program failure, and bug validation to generate quick fixes to the isolated bugs, thereby forming a complete process of automated debugging. Bugs in both sequential and parallel programs are the target in this research. For parallel programs, the research investigates thread interaction under the transactional memory programming model and develops novel automated debugging schemes for concurrency bugs. The research also includes the prototype of the novel architectural supports to evaluate their effectiveness with real-world applications.