MIND NanoArchitecture Workshop: Exploring Design with post-CMOS Devices

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MIND NanoArchitecture Workshop: Exploring Design with post-CMOS DevicesThe purpose of this workshop is to explore the implications of proposed post-CMOS devices at the circuit, architecture, and system levels. Recognized experts will present their vision, and strong session chairs will guide the discussion. Anticipated outcomes of this workshop include benchmarks and figures of merit for evaluating candidate devices, and identification of alternative circuits, architectures, and/or compute systems in which specific, promising new structures can extend or supersede CMOS design-space?s superiorityAs CMOS technology is approaching fundamental limits, much effort is concentrated on finding Post-CMOS switching devices. These novel devices necessitate the identification of appropriate circuit architectures, which might be different from what is being used for conventional CMOS devices. This workshop will explore architectures and designs which will support Post-CMOS, potentially hybrid, technology applications. As such, the outcomes of this workshop will lay the intellectual groundwork for transformative advances that are needed for the design of Post-CMOS computer systems. This workshop will have broad impact by bringing together leading experts from the traditionally-distinct device, circuit, architectures, and systems communities. This work will increase the interactions between NSF and SRC-NRI Centers, and help coordinate the work of the whole NSF / NRI community. We anticipate that the outcomes of this workshop will direct future developments in this field, including architectural findings and benchmarks and figures of merit for evaluating candidate devices. On a grander scale, these outcomes will help identify strategic directions for the continuation of the microelectronics industry beyond the end of the CMOS technology roadmap.